ADuCM362/ADuCM363 Data Sheet
Rev. 0| Page 20 of 24
Pin No. Mnemonic Description
13 GND_SW Sensor Power Switch to Analog Ground Reference.
14 VREF+
External Reference Positive Input. An external reference can be applied between the VREF+
and VREF− pins.
15 VREF−
External Reference Negative Input. An external reference can be applied between the VREF+
and VREF− pins.
16 AGND Analog System Ground Reference Pin.
17 AVDD Analog System Supply Pin. This pin must be connected to AGND via a 0.1 µF capacitor.
18 AVDD_REG
Internal Analog Regulator Supply Output. This pin must be connected to AGND via a 470 nF
capacitor and to Pin 7, DVDD_REG.
19 DAC DAC Voltage Output.
20 INT_REF Internal Reference. This pin must be connected to ground via a 470 nF decoupling capacitor.
21 IREF
Optional Reference Current Resistor Connection for the Excitation Current Sources. The
reference current used for the excitation current sources is set by a low drift (5 ppm/°C)
external resistor connected to this pin.
22 AIN5/IEXC
ADC Analog Input 5/Excitation Current Source. This pin can be configured as a positive or
negative input to either ADC in differential or single-ended mode (AIN5). This pin can also be
configured as the output pin for Excitation Current Source 0 or Excitation Current Source 1 (IEXC).
23 AIN6/IEXC
ADC Analog Input 6/Excitation Current Source. This pin can be configured as a positive or
negative input to either ADC in differential or single-ended mode (AIN6). This pin can also be
configured as the output pin for Excitation Current Source 0 or Excitation Current Source 1 (IEXC).
24 AIN7/VBIAS0/IEXC/EXTREF2IN+
ADC Analog Input 7/Bias Voltage Output/Excitation Current Source/External Reference 2
Positive Input. This pin can be configured as a positive or negative input to either ADC in
differential or single-ended mode (AIN7). This pin can also be configured as an analog output
pin to generate a bias voltage, VBIAS0 of AVDD_REG/2 (VBIAS0); as the output pin for Excitation
Current Source 0 or Excitation Current Source 1 (IEXC); or as the positive input for External
Reference 2 (EXTREF2IN+).
25 AIN8/EXTREF2IN−
ADC Analog Input 8/External Reference 2 Negative Input. This pin can be configured as a
positive or negative input to either ADC in differential or single-ended mode (AIN8). This pin
can also be configured as the negative input for External Reference 2 (EXTREF2IN−).
26 AIN9/DACBUFF+
ADC Analog Input 9/Noninverting Input to the DAC Output Buffer. This pin can be configured
as a positive or negative input to either ADC in differential or single-ended mode (AIN9). This
pin can also be configured as the noninverting input to the DAC output buffer when the DAC
is configured for NPN mode (DACBUFF+).
27 AIN10
ADC Analog Input 10. This pin can be configured as a positive or negative input to either ADC
in differential or single-ended mode.
28 AIN11/VBIAS1
ADC Analog Input 11/Bias Voltage Output. This pin can be configured as a positive or
negative input to either ADC in differential or single-ended mode (AIN11). This pin can also be
configured as an analog output pin to generate a bias voltage, VBIAS1 of AVDD_REG/2 (VBIAS1).
29
P0.0/MISO1/UART1DCD/
UARTDCD
General-Purpose Input/Output P0.0/SPI1 Master Input, Slave Output Pin/UART1 Data Carrier
Detect Pin/ UART Data Carrier Detect Pin.
30 P0.1/SCLK1/SCL/RxD
General-Purpose Input/Output P0.1/SPI1 Serial Clock Pin/I
2
C Serial Clock Pin/UART Serial
Input (Data Input for the UART Downloader).
31 P0.2/MOSI1/SDA/TxD
General-Purpose Input/Output P0.2/SPI1 Master Output, Slave Input Pin/I
2
C Serial Data Pin/
UART Serial Output (Data Output for the UART Downloader).
32
P0.3/IRQ0/CS1
/RTS1/RTS General-Purpose Input/Output P0.3/External Interrupt Request 0/SPI1 Chip Select Pin (Active
Low) (when using SPI1, configure this pin as CS1
)/UART1 Request to Send Signal/UART
Request to Send Signal.
33 P0.4/RTS/ECLKO/RTS1
General-Purpose Input/Output P0.4/UART Request to Send Signal/External Clock Output Pin
for Test Purposes/UART1 Request to Send Signal.
34 P0.5/IRQ1/CTS General-Purpose Input/Output P0.5/External Interrupt Request 1/UART Clear to Send Signal.
35 P0.6/IRQ2/RxD1 General-Purpose Input/Output P0.6/External Interrupt Request 2/UART1 Serial Input.
36 P0.7/POR/TxD1 General-Purpose Input/Output P0.7/Power-On Reset Pin (Active High)/UART1 Serial Output.
37 IOVDD Digital System Supply Pin. This pin must be connected to DGND via a 0.1 µF capacitor.
38 P1.0/IRQ3/PWMSYNC/EXTCLK
General-Purpose Input/Output P1.0/External Interrupt Request 3/PWM External
Synchronization Input/External Clock Input Pin.
39 P1.1/IRQ4/PWMTRIP/DTR
General-Purpose Input/Output P1.1/External Interrupt Request 4/PWM External Trip Input/
UART Data Terminal Ready Pin.
40 P1.2/PWM0/RI General-Purpose Input/Output P1.2/PWM0 Output/UART Ring Indicator Pin.
