9FG830
IDT
®
Eight Output Differential Frequency Generator for PCIe Gen3 and QPI 1680E—04/04/17
Eight Output Differential Frequency Generator
for PCIe Gen3 and QPI
1
DATASHEET
General Description:
The 9FG830 is a Frequency Timing Generator that provides 8
HCSL differential output pairs. These outputs support PCI-Express
Gen3, and QPI applications. The part supports Spread Spectrum
and synthesizes several additional output frequencies from either
a 14.31818 MHz crystal, a 25 MHz crystal or reference input clock.
The 9FG830 also outputs a copy of the reference clock. Complete
control of the device is available via strapping pins or via the
SMBus interface.
Recommended Application:
8 Output Differential Output Frequency Generator for PCIe Gen3
and QPI
Output Features:
8 - 0.7V current mode differential HCSL output pairs
1 - 3.3V LVTTL REF output
Features/Benefits:
Pin-to-Pin with 9FG108D; Easy upgrade to PCIe Gen3
Generates common frequencies from 14.318 MHz or 25
MHz; single part supports mulitple applications
Provides copy of reference output; eleminates need for
additional crystal or oscillator
Three spread spectrum modes: -0.5%, +/-0.25%, and off;
EMI reduction
Unused outputs may be disabled in Hi-Z; save system
power
Device may be configured by SMBus and/or strap pins;
can be used in systems without SMBus
Key Specifications:
Cycle-to-cycle jitter: < 50ps with 25MHz input
Output-to-output skew: <50ps
Phase jitter: PCIe Gen3 < 1ps rms
Phase jitter: QPI 9.6GB/s < 0.2ps rms
10 ppm synthesis error with 25MHz input and Spread Off
Functional Block Diagram
STOP
LOGIC
XIN/CLKIN
X2
DIF(7:0)
CONTROL
LOGIC
SPREAD
FS(2:0)
SDATA
SCLK
SEL14M_25M#
DIF_STOP#
PROGRAMMABLE
SPREAD PLL
8
IREF
OSC
R
E
F
O
U
T
OE(7:0)
IDT
®
Eight Output Differential Frequency Generator for PCIe Gen3 and QPI 1680E—04/04/17
9FG830
Eight Output Differential Frequency Generator for PCIe Gen3 and QPI
2
Pin Configuration
Power Groups
VDD GND
34
10,14,19,31,36,40 15,35
N/A 47
48 47
IREF
Analog VDD & GND for PLL Core
Descri
p
tion
Pin Number
REFOUT, Digital Inputs, SMBus
DIF Outputs
Frequency Select Table
SEL14M_25M#
(FS3)
FS2 FS1 FS0 OUTPUT(MHz)
0 0 0 0 100.00
0 0 0 1 125.00
0 0 1 0 133.33
0 0 1 1 166.67
0 1 0 0 200.00
0 1 0 1 266.67
0 1 1 0 333.33
0 1 1 1 400.00
1 0 0 0 100.00
1 0 0 1 125.00
1 0 1 0 133.33
1 0 1 1 166.67
1 1 0 0 200.00
1 1 0 1 266.67
1 1 1 0 333.33
1 1 1 1 400.00
XIN/CLKIN 1 48 VDDA
X2 2 47 GNDA
VDD 3 46 IREF
GND 4 45 vFS0
REFOUT 5 44 vFS1
vFS2 6 43 vOE_0
vOE_7 7 42 DIF_0
DIF_7 8 41 DIF_0#
DIF_7# 9 40 VDD
VDD 10 39 DIF_1
DIF_6 11 38 DIF_1#
DIF_6# 12 37 ^OE_1
^OE_6 13 36 VDD
VDD 14 35 GND
GND 15 34 ^OE_2
^OE_5 16 33 DIF_2
DIF_5 17 32 DIF_2#
DIF_5# 18 31 VDD
VDD 19 30 DIF_3
DIF_4 20 29 DIF_3#
DIF_4# 21 28 vOE_3
vOE_4 22 27 ^SEL14M_25M#
SDATA 23 26 vSPREAD
SCLK 24 25 DIF_STOP#
9FG830
^ indicates internal 120K pull up
v indicates internal 120K pull down
IDT
®
Eight Output Differential Frequency Generator for PCIe Gen3 and QPI 1680E—04/04/17
9FG830
Eight Output Differential Frequency Generator for PCIe Gen3 and QPI
3
Pin Description
PIN # PIN NAME PIN TYPE DESCRIPTION
1 XIN/CLKIN IN Crystal input or Reference Clock input
2 X2 OUT Crystal output, Nominally 14.318MHz
3 VDD PWR Power supply, nominal 3.3V
4 GND PWR Ground pin.
5 REFOUT OUT Reference Clock output
6 vFS2 IN Frequency select pin. This pin has an internal 120k pull down resistor
7 vOE_7 IN
Active high input for enabling output 7. This pin has a 120kohm pull down.
0 =disable outputs, 1= enable outputs
8 DIF_7 OUT 0.7V differential true clock output
9 DIF_7# OUT 0.7V differential Complementary clock output
10 VDD PWR Power supply, nominal 3.3V
11 DIF_6 OUT 0.7V differential true clock output
12 DIF_6# OUT 0.7V differential Complementary clock output
13 ^OE_6 IN
Active high input for enabling output 6. This pin has an internal 120kohm pull up.
0 = disable outputs, 1= enable outputs
14 VDD PWR Power supply, nominal 3.3V
15 GND PWR Ground pin.
16 ^OE_5 IN
Active high input for enabling output 5. This pin has an internal 120kohm pull up.
0 = disable outputs, 1= enable outputs
17 DIF_5 OUT 0.7V differential true clock output
18 DIF_5# OUT 0.7V differential Complementary clock output
19 VDD PWR Power supply, nominal 3.3V
20 DIF_4 OUT 0.7V differential true clock output
21 DIF_4# OUT 0.7V differential Complementary clock output
22 vOE_4 IN
Active high input for enabling output 4. This pin as an internal 120kohm pull down.
0 =disable outputs, 1= enable outputs
23 SDATA I/O Data pin for SMBus circuitry, 5V tolerant.
24 SCLK IN Clock pin of SMBus circuitry, 5V tolerant.
25 DIF_STOP# IN Active low input to stop differential output clocks.
26 vSPREAD IN
Asynchronous, active high input to enable spread spectrum functionality. This pin has
a 120Kohm pull down resistor.
27 ^SEL14M_25M# IN
Select 14.31818 MHz or 25 Mhz input frequency. This pin has an internal 120kohm
pull up resistor.
1 = 14.31818 MHz, 0 = 25 MHz
28 vOE_3 IN
Active high input for enabling output 3. This pin has an internal 120kohm pull down
resistor.
0 =disable outputs, 1= enable outputs
29 DIF_3# OUT 0.7V differential Complementary clock output
30 DIF_3 OUT 0.7V differential true clock output

9FG830AFLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner PCIE SYNTHESIZER - GEN3, 8 OUTPUT
Lifecycle:
New from this manufacturer.
Delivery:
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