9FG830AFLF Datasheet 9FG830AGILF, 9FG830AFILFT, 9FG830AGLFT | P7-P9

IDT

Eight Output Differential Frequency Generator for PCIe Gen3 and QPI 1680E—04/04/17

9FG830

Eight Output Differential Frequency Generator for PCIe Gen3 and QPI

Electrical Characteristics - Phase Jitter Parameters

TA = T

COM

or T

IND;

Supply Voltage VDD = 3.3 V +/-5%, See Test Loads for loading conditions

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes

hPCIeG1

PCIe Gen 1 86 ps (p-p) 1,2,3,6

PCIe Gen 2 Lo Band

10kHz < f < 1.5MHz

(rms)

1,2,6

PCIe Gen 2 High Band

1.5MHz < f < Nyquist (50MHz)

3.1

(rms)

1,2,6

jphPCIeG3

PCIe Gen 3

(PLL BW of 2-4MHz, CDR = 10MHz)

(rms)

1,2,4,5,

QPI & SMI

(100MHz or 133MHz, 4.8Gb/s, 6.4Gb/s 12UI)

0.5

(rms)

1,5,6

QPI & SMI

(100MHz, 8.0Gb/s, 12UI)

0.3

(rms)

1,5,6

QPI & SMI

(100MHz, 9.6Gb/s, 12UI)

0.2

(rms)

1,5,6

Guaranteed by design and characterization, not 100% tested in production.

Applies to all differential outputs

Sam

le size of at least 100K c

cles. This fi

ures extra

olates to 108

k @ 1M c

cles for a BER of 1-12.

Sub

ect to final radification b

PCI SIG.

jphQPI_SMI

Calculated from Intel-su

lied Clock Jitter Tool v 1.6.3

Phase Jitter, QPI/SMI

See htt

://www.

cisi

.com for com

lete s

ecs

jphPCIeG2

Phase Jitter, PCI Express

Electrical Characteristics - REF-14.318/25 MHz

TA = T

COM

or T

IND

; Supply Voltage VDD = 3.3 V +/-5%; See Test Loads for Loads for loading conditions.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes

Long Accuracy ppm see Tperiod min-max values ppm 1,2

Clock period T

eriod

14.318MHz output nominal 69.8413 ns 1,2

Clock period T

eriod

25.000MHz output nominal 40 ns 1,2

Output High Voltage V

= -1 mA 2.4 V 1

Output Low Voltage V

= 1 mA 0.4 V 1

Output High Current I

@MIN = 1.0 V, V

@MAX = 3.135 V -29 -23 mA 1

Output Low Current I

@MIN = 1.95 V, V

@MAX = 0.4 V 29 27 mA 1

Rise/Fall Time t

rf1

= 0.4 V, V

= 2.4 V 0.5 2 ns 1

Duty Cycle d

= 1.5 V 45 55 % 1

Jitter t

jcyc-cyc

VT = 1.5 V 100 250 ps 1

Guaranteed by design and characterization, not 100% tested in production.

All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is trimmed to 14.31818 or 25.00 MHz

IDT

Eight Output Differential Frequency Generator for PCIe Gen3 and QPI 1680E—04/04/17

9FG830

Eight Output Differential Frequency Generator for PCIe Gen3 and QPI

Common Recommendations for Differential Routing Dimension or Value Unit Notes

L1 length, route as non-coupled 50ohm trace 0.5 max inch 1

L2 length, route as non-coupled 50ohm trace 0.2 max inch 1

L3 length, route as non-coupled 50ohm trace 0.2 max inch 1

Rs 33 ohm 1

Rt 49.9 ohm 1

Down Device Differential Routing

L4 length, route as coupled microstrip 100ohm differential trace 2 min to 16 max inch 1

L4 length, route as coupled stripline 100ohm differential trace 1.8 min to 14.4 max inch 1

Differential Routing to PCI Express Connector

L4 length, route as coupled microstrip 100ohm differential trace 0.25 to 14 max inch 2

L4 length, route as coupled stripline 100ohm differential trace 0.225 min to 12.6 max inch 2

SRC Reference Clock

HCSL Output Buffer

L1'

L2'

L4'

L3L3'

Rt Rt

PCI Express

Down Device

REF_CLK Input

Figure 1: Down Device Routing

(Test Load)

HCSL Output Buffer

L1'

L2'

L4'

L3L3'

Rt Rt

PCI Express

Add-in Board

REF_CLK Input

Figure 2: PCI Express Connector Routing

IDT

Eight Output Differential Frequency Generator for PCIe Gen3 and QPI 1680E—04/04/17

9FG830

Eight Output Differential Frequency Generator for PCIe Gen3 and QPI

Vdiff Vp-p Vcm R1 R2 R3 R4 Note

0.45v 0.22v 1.08 33 150 100 100

0.58 0.28 0.6 33 78.7 137 100

0.80 0.40 0.6 33 78.7 none 100 ICS874003i-02 input compatible

0.60 0.3 1.2 33 174 140 100 Standard LVDS

R1a = R1b = R1

R2a = R2b = R2

Alternative Termination for LVDS and other Common Differential Signals (Figure 3)

HCSL Output Buffer

L1'

R1b

L2'

R1a

L4'

R2a R2b

Down Device

REF_CLK Input

Figure 3

L3'

R3 R4

Component Value Note

R5a, R5b 8.2K 5%

R6a, R6b 1K 5%

Cc 0.1 µF

Vcm 0.350 volts

Cable Connected AC Coupled Application (figure 4)

PCIe Device

REF_CLK Input

Figure 4

R5a

L4'

3.3 Volts

R5b

R6a R6b

9FGxxx REF Output

Figure 5. REF Output Test Load

5pF

Zo = 50 ohms

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P19

9FG830AFLF

Mfr. #:

Buy 9FG830AFLF

Manufacturer:

IDT

Description:

Clock Synthesizer / Jitter Cleaner PCIE SYNTHESIZER - GEN3, 8 OUTPUT

Lifecycle:

New from this manufacturer.

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9FG830AFLF

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