Precision Analog Microcontroller, Analog I/O
with MDIO Interface, ARM Cortex-M3
Data Sheet
Rev. 0 Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Analog input/output
Multichannel, 12-bit, 1 MSPS analog-to-digital
converter (ADC)
Up to 16 ADC input channels
0 V to VREF analog input range
Single-ended modes
AVDD and IOVDD monitors
12-bit voltage output digital-to-analog converters (VDACs)
8 VDACs with a range of 0 V to 2.5 V or AV
DD
outputs
Voltage comparator
Microcontroller
ARM Cortex-M3 processor, 32-bit RISC architecture
Serial wire port supports code download and debug
Clocking options
80 MHz phase-locked loop (PLL) with programmable divider
Trimmed on-chip oscillator (±3%)
External 16 MHz crystal option
External clock source up to 80 MHz
Memory
2 × 128 kB independent Flash/EE memories
10,000 cycle Flash/EE endurance
20-year Flash/EE retention
32 kB SRAM
Software triggered in-circuit reprogrammability via
management data input/output (MDIO)
On-chip peripherals
MDIO slave up to 4 MHz
2 × I
2
C, 2 × SPI, UART
Multiple general-purpose input/output (GPIO) balls: 3.6 V
compliant
7 × 1.2 V compatible when used for MDIO
32-element programmable logic array (PLA)
3 general-purpose timers
Wake-up timer
Watchdog timer
16-bit pulse width modulator (PWM)
Power
Supply range: 2.9 V to 3.6 V
Flexible operating modes for low power applications
Packages and temperature range
6 mm × 6 mm, 96-ball CSP_BGA package
Fully specified for −40°C to +105°C ambient operation
Tools
QuickStart development system
Full third-party support
APPLICATIONS
Optical networking
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
MEMORY
2 × 128kB FLASH
32kB SRAM
ARM
CORTEX-M3
PROCESSOR
MUX
RESET
AIN0
AIN5
AIN6
AIN15
BUF_VREF2V5
VDAC7
ADuCM322
AGNDx
IOVDDx
IOGNDx
GENERAL
PURPOSE
I/O PORTS
SWDIO
SWCLK
GPIO PORTS
UART
2 × SPI
2 × I
2
C
EXT IRQS
MDIO
PLA
INTERNAL
CHANNELS:
TEMPERATURE,
AV
DD
, IOV
DD
2.5V BAND GAP
DMA
NVIC
RESET SYSTEM
SERIAL WIRE
CLOCK SYSTEM
32.768kHz
16MHz OSC
80MHz PLL
3 × GP TIMER
WD TIMER
WAKE-UP TIMER
PWM
VDAC
SAR ADC
COMPARATOR
XTALO XTALI ECLKIN
AVDDx
DGNDx
PWM0 TO
PWM6
1.8 V LDO
VDAC0
VDAC
13754-001
