40 Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
Notes to tables:
(1) Microparameters are timing delays contributed by individual architectural elements and cannot be measured
explicitly.
(2) Operating conditions:
V
CCIO
= 5.0 V ± 5% for commercial use in 5.0-V FLEX 6000 devices.
V
CCIO
= 5.0 V ± 10% for industrial use in 5.0-V FLEX 6000 devices.
V
CCIO
= 3.3 V ± 10% for commercial or industrial use in 3.3-V FLEX 6000 devices.
(3) Operating conditions:
V
CCIO
= 3.3 V ± 10% for commercial or industrial use in 5.0-V FLEX 6000 devices.
V
CCIO
= 2.5 V ± 0.2 V for commercial or industrial use in 3.3-V FLEX 6000 devices.
(4) Operating conditions:
V
CCIO
= 2.5 V, 3.3 V, or 5.0 V.
(5) These parameters are worst-case values for typical applications. Post-compilation timing simulation and timing
analysis are required to determine actual worst-case performance.
(6) This timing parameter shows the delay of a register-to-register test pattern and is used to determine speed grades.
There are 12 LEs, including source and destination registers. The row and column interconnects between the
registers vary in length.
(7) This timing parameter is shown for reference and is specified by characterization.
(8) This timing parameter is specified by characterization.
Tables 24 through 28 show the timing information for EPF6010A and
EPF6016A devices.
Table 23. External Timing Parameters
Symbol Parameter Conditions
t
INSU
Setup time with global clock at LE register (8)
t
INH
Hold time with global clock at LE register (8)
t
OUTCO
Clock-to-output delay with global clock with LE register using FastFLEX I/O
pin
(8)
Table 24. LE Timing Microparameters for EPF6010A & EPF6016A Devices (Part 1 of 2)
Parameter Speed Grade Unit
-1 -2 -3
Min Max Min Max Min Max
t
REG_TO_REG
1.2 1.3 1.7 ns
t
CASC_TO_REG
0.9 1.0 1.2 ns
t
CARRY_TO_REG
0.9 1.0 1.2 ns
t
DATA_TO_REG
1.1 1.2 1.5 ns
t
CASC_TO_OUT
1.3 1.4 1.8 ns
t
CARRY_TO_OUT
1.6 1.8 2.3 ns
t
DATA_TO_OUT
1.7 2.0 2.5 ns
t
REG_TO_OUT
0.4 0.4 0.5 ns
t
SU
0.9 1.0 1.3 ns
t
H
1.4 1.7 2.1 ns
Altera Corporation 41
FLEX 6000 Programmable Logic Device Family Data Sheet
t
CO
0.3 0.4 0.4 ns
t
CLR
0.4 0.4 0.5 ns
t
C
1.8 2.1 2.6 ns
t
LD_CLR
1.8 2.1 2.6 ns
t
CARRY_TO_CARRY
0.1 0.1 0.1 ns
t
REG_TO_CARRY
1.6 1.9 2.3 ns
t
DATA_TO_CARRY
2.1 2.5 3.0 ns
t
CARRY_TO_CASC
1.0 1.1 1.4 ns
t
CASC_TO_CASC
0.5 0.6 0.7 ns
t
REG_TO_CASC
1.4 1.7 2.1 ns
t
DATA_TO_CASC
1.1 1.2 1.5 ns
t
CH
2.5 3.0 3.5 ns
t
CL
2.5 3.0 3.5 ns
Table 25. IOE Timing Microparameters for EPF6010A & EPF6016A Devices
Parameter Speed Grade Unit
-1 -2 -3
Min Max Min Max Min Max
t
OD1
1.9 2.2 2.7 ns
t
OD2
4.1 4.8 5.8 ns
t
OD3
5.8 6.8 8.3 ns
t
XZ
1.4 1.7 2.1 ns
t
XZ1
1.4 1.7 2.1 ns
t
XZ2
3.6 4.3 5.2 ns
t
XZ3
5.3 6.3 7.7 ns
t
IOE
0.5 0.6 0.7 ns
t
IN
3.6 4.1 5.1 ns
t
IN_DELAY
4.8 5.4 6.7 ns
Table 24. LE Timing Microparameters for EPF6010A & EPF6016A Devices (Part 2 of 2)
Parameter Speed Grade Unit
-1 -2 -3
Min Max Min Max Min Max
42 Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
Notes:
(1) Setup times are longer when the Increase Input Delay option is turned on. The setup time values are shown with the
Increase Input Delay option turned off.
(2) Hold time is zero when the Increase Input Delay option is turned on.
Table 26. Interconnect Timing Microparameters for EPF6010A & EPF6016A Devices
Parameter Speed Grade Unit
-1 -2 -3
Min Max Min Max Min Max
t
LOCAL
0.7 0.7 1.0 ns
t
ROW
2.9 3.2 3.2 ns
t
COL
1.2 1.3 1.4 ns
t
DIN_D
5.4 5.7 6.4 ns
t
DIN_C
4.3 5.0 6.1 ns
t
LEGLOBAL
2.6 3.0 3.7 ns
t
LABCARRY
0.7 0.8 0.9 ns
t
LABCASC
1.3 1.4 1.8 ns
Table 27. External Reference Timing Parameters for EPF6010A & EPF6016A Devices
Parameter Device Speed Grade Unit
-1 -2 -3
Min Max Min Max Min Max
t
1
EPF6010A 37.6 43.6 53.7 ns
EPF6016A 38.0 44.0 54.1 ns
Table 28. External Timing Parameters for EPF6010A & EPF6016A Devices
Parameter Speed Grade Unit
-1 -2 -3
Min Max Min Max Min Max
t
INSU
2.1 (1) 2.4 (1) 3.3 (1) ns
t
INH
0.2 (2) 0.3 (2) 0.1 (2) ns
t
OUTCO
2.0 7.1 2.0 8.2 2.0 10.1 ns

EPF6010ATI100-2

Mfr. #:
Manufacturer:
Intel / Altera
Description:
FPGA - Field Programmable Gate Array FPGA - Flex 6000 88 LABs 71 IOs
Lifecycle:
New from this manufacturer.
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