XRT81L27
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SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
REV. 1.1.0
8
102
RPOS_3/
RDATA_3
O
Receiver 3 Positive/NRZ Data Output:
(see pin 35
)
103
AVDD AVdd
Analog Positive Supply(3.3V± 5%)
104
AGND Gnd
Analog Supply Ground
105
TClk_1 I
Transmitter 1 Clock Input:
E1 rate at 2.048MHz ± 50ppm.
106
TPOS_1/
TDATA_1
I
Transmitter 1 Positive/ NRZ Data Input:
(see pin 38)
107
TNEG_1/
CODE_1
I-L
Transmitter 1 Negative Data Input:
(see pin 39)
108
TA O S _ 1 I - L
Transmit All Ones Channel_1:
(see pin 40)
109
TClk_3 I
Transmitter 3 Clock Input:
E1 rate at 2.048MHz ± 50ppm.
110
TPOS_3/
TDATA_3
I
Transmitter 3 Positive/ NRZ Data Input:
(see pin 38)
111
TNEG_3/
CODE_3
I-L
Transmitter 3 Negative Data Input:
(see pin 39)
112
TA O S _ 3 I - L
Transmit All Ones Channel_4:
(see pin 40)
113
TA O S _ 2 I - L
Transmit All Ones Channel_ 2:
(see pin 40)
114
TNEG_2/
CODE_2
I-L
Transmitter 2 Negative Data Input:
(see pin 39)
115
TPOS_2/
TDATA_2
I
Transmitter 2 Positive/ NRZ Data Input:
(see pin 38)
116
TClk_2 I
Transmitter 2 Clock Input:
E1 rate at 2.048MHz ± 50ppm.
117
TA O S _ 0 I - L
Transmit All Ones Channel_ 0:
(see pin 40)
118
TNEG_0/
CODE_0
I-L
Transmitter 0 Negative Data Input:
(see pin 39)
119
TPOS_0/
TDATA_0
I
Transmitter 0 Positive/ NRZ Data Input:
(see pin 38)
120
TClk_0 I
Transmitter 0 Clock Input:
E1 rate at 2.048MHz ± 50ppm.
121
GND Gnd
Digital Supply Ground
122
VDD Vdd
Digital Positive Supply(3.3V± 5%)
123
RPOS_2/
RDATA_2
O
Receiver 2 Positive/NRZ Data Output:
(see pin 35
)
124
RNEG_2/
LCV_2
O
Receiver 2 Negative Data Output:
(see pin 34)
125
RClk_2 O
Receiver 2 Clock Output:
126
LOS_2 O
Receiver 2 Loss of Signal:
(see pin 2)
PIN DESCRIPTIONS
N
OTE
: I -H
indicates an input pin with a 50k
Ω
pull-up Resistor, I-L indicates an input pin with a 50k
Ω
pull-down resistor.
P
IN
#N
AME
T
YPE
D
ESCRIPTION
