2©2016 Integrated Device Technology, Inc. Revision B, March 4, 2016
853S01 Datasheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Tables
Table 3. Control Input Function Table
Number Name Type Description
1 PCLK0 Input Pulldown Non-inverting differential LVPECL clock input.
2 nPCLK0 Input
Pullup/
Pulldown
Inverting differential LVPECL clock input. V
CC
/2 default when left floating.
3 PCLK1 Input Pulldown Non-inverting differential LVPECL clock input.
4 nPCLK1 Input
Pullup/
Pulldown
Inverting differential LVPECL clock input. V
CC
/2 default when left floating.
5V
BB
Output Bias voltage.
6 CLK_SEL Input Pulldown
Clock select input. When HIGH, selects PCLK1, nPCLK1 inputs. When
LOW, selects PCLK0, nPCLK0 inputs. LVCMOS/LVTTL interface levels.
7, 16 nc Unused No connect.
8, 13 V
CC
Power Positive supply pins.
9, 12, 14, 15 V
EE
Power Negative supply pins.
10, 11
nQ, Q
Output Differential output pair. LVPECL interface levels.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 2 pF
R
PULLDOWN
Input Pulldown Resistor 37 k
R
PULLUP
Input Pullup Resistor 37 k
CLK_SEL Input Selected
0 PCLK0, nPCLK0
1 PCLK1, nPCLK1
