NCP1060, NCP1063
www.onsemi.com
15
Application Information
Introduction
The NCP106X offers a complete current−mode control
solution. The component integrates everything needed to
build a rugged and cost effective Switch−Mode Power
Supply (SMPS) featuring low standby power. The Quick
Selection Table, Table 5, details the differences between
references, mainly peak current setpoints, R
DS(on)
value and
operating frequency.
• Current−mode operation: the controller uses
current−mode control architecture.
• 700 V –_ Power MOSFET: Due to ON Semiconductor
Very High Voltage Integrated Circuit technology, the
circuit hosts a high−voltage power MOSFET featuring
a 34 W or 11.4 W R
DS(on)
– Tj = 25°C. This value lets
the designer build a power supply up to 7.8 W or
15.5 W operated on universal mains. An internal
current source delivers the startup current, necessary to
crank the power supply.
• Dynamic Self−Supply: Due to the internal high
voltage current source, this device could be used in the
application without the auxiliary winding to provide
supply voltage.
• Short circuit protection: by permanently monitoring
the COMP line activity, the IC is able to detect the
presence of a short−circuit, immediately reducing the
output power for a total system protection. A t
SCP
timer
is started as soon as the COMP current is below
threshold, I
COMPfault
, which indicates the maximum
peak current. If at the end of this timer the fault is still
present, then the device enters a safe, auto−recovery
burst mode, affected by a fixed timer recurrence,
t
recovery
. Once the short has disappeared, the controller
resumes and goes back to normal operation.
• Built−in VCC Over Voltage Protection: when the
auxiliary winding is used to bias the V
CC
pin (no DSS),
an internal comparator is connected to V
CC
pin. In case
the voltage on the pin exceeds a level of V
OVP
(18 V
typically), the controller immediately stops switching
and waits a full timer period (t
recovery
) before
attempting to restart. If the fault is gone, the controller
resumes operation. If the fault is still there, e.g. a
broken opto−coupler, the controller protects the load
through a safe burst mode.
• Line detection: An internal comparator monitors the
drain voltage as recovering from one of the following
situations:
♦ Short Circuit Protection,
♦ V
CC
OVP is confirmed,
♦ UVLO,
♦ TSD
• If the drain voltage is lower than the internal threshold
(V
HV(EN)
), the internal power switch is inhibited. This
avoids operating at too low ac input. This is also called
brown−in function in some fields. For applications not
using standard AC mains (24 Vdc industrial bus for
instance), the B version doesn’t incorporate this line
detection and let the device start as soon as voltage
supply reaches V
start(min).
• Frequency jittering: an internal low−frequency
modulation signal varies the pace at which the
oscillator frequency is modulated. This helps spreading
out energy in conducted noise analysis. To improve the
EMI signature at low power levels, the jittering remains
active in frequency foldback mode.
• Soft−Start: a 4 ms soft−start ensures a smooth startup
sequence, reducing output overshoots.
• Frequency foldback capability: a continuous flow of
pulses is not compatible with no−load/light−load
standby power requirements. To excel in this domain,
the controller observes the COMP pin current
information and when it reaches a level of I
COMPfold
,
the oscillator then starts to reduce its switching
frequency as the feedback current continues to increase
(the power demand continues to reduce). It can go
down to 25 kHz (typical) reached for a feedback level
of I
COMPfold(end)
(100 mA roughly). At this point, if the
power continues to drop, the controller enters classical
skip−cycle mode.
• Skip: if SMPS naturally exhibits a good efficiency at
nominal load, it begins to be less efficient when the
output power demand diminishes. By skipping
un−needed switching cycles, the NCP106X drastically
reduces the power wasted during light load conditions.
• Ipeak set: If current in range 26 mA and 285 mA is
drawn from the pin, the peak current is proportionally
reduced down to 40% of its original value. This feature
enables to designer to set up the peak current to the
value which is ideal for the application.
By routing a portion of the negative voltage present during
the on−time on the auxiliary winding to the LIM/OPP pin,
the user has a simple and non−dissipative means to alter the
maximum peak current setpoint as the bulk voltage
increases.
