NCP1060, NCP1063
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19
V
OVP
GND
V
CC
Drain
Shut down
Internal DRV
80
ms
filter
V
CC (on)
=9.0V
V
CC (min )
=7.5V
I
start 1
R
limit
D1
C
VCC C
AUX N
AUX
Figure 33. A more detailed view of the NCP106X offers better insight on how to properly wire an auxiliary winding
V
CC
I
COMP
TIMER
DRV
internal
V
CC(min)
V
CC(on)
V
OVP
Fault level
48 ms typ.
400 ms typ.
Figure 34. describes the main signal variations when the part operates in auto−recovery OVP:
Soft−start
The NCP106X features a 4 ms soft−start which reduces
the power−on stress but also contributes to lower the output
overshoot. Figure 35 shows a typical operating waveform.
The NCP106X features a novel patented structure which
offers a better soft−start ramp, almost ignoring the start−up
pedestal inherent to traditional current−mode supplies.
NCP1060, NCP1063
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20
Drain current
V
CC
V
CCON
Max Ip
4ms
0V (fresh PON)
Figure 35. The 4 ms Soft−start Sequence
Jittering
Frequency jittering is a method used to soften the EMI
signature by spreading the energy in the vicinity of the main
switching component. The NCP106X offers a ±6%
deviation of the nominal switching frequency. The sweep
sawtooth is internally generated and modulates the clock up
and down with a fixed frequency of 300 Hz. Figure 36 shows
the relationship between the jitter ramp and the frequency
deviation. It is not possible to externally disable the jitter.
60 kHz
63.6 kHz
56.4 kHz
Jitter ramp
Internal
sawtooth
adjustable
Figure 36. Modulation Effects on the Clock Signal by the Jittering Sawtooth
Line Detection (for A version only)
An internal comparator monitors the drain voltage as
recovering from one of the following situations:
Short Circuit Protection,
V
CC
OVP is confirmed,
UVLO
TSD
If the drain voltage is lower than the internal threshold
V
HV(EN)
(87 Vdc typically), the internal power switch is
inhibited. This avoids operating at too low ac input.
NCP1060, NCP1063
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21
Frequency Foldback
The reduction of no−load standby power associated with
the need for improving the efficiency, requires to change the
traditional fixed−frequency type of operation. This device
implements a switching frequency foldback when the
COMP current passes above a certain level, I
COMPfold
, set
around 68 mA. At this point, the oscillator enters frequency
foldback and reduces its switching frequency.
The internal peak current set−point is following the
COMP current information until its level reaches I
Freeze
.
Below this value, the peak current setpoint is frozen to 30%
of the I
PK(0)
. The only way to further reduce the transmitted
power is to diminish the operating frequency down to F
min
(25 kHz typically). This value is reached at a COMP current
level of I
COMPfold(end)
(100 mA typically). Below this point,
if the output power continues to decrease, the part enters skip
cycle for the best noise−free performance in no−load
conditions. Figure 37 and Figure 38 depict the adopted
scheme for the part.
Figure 37. By observing the current on the COMP pin, the controller reduces its
switching frequency for an improved performance at light load.
0
10
20
30
40
50
60
70
80
90
100
110
50 60 70 80 90 100
Frequency [kHz]
I
COMP
[mA]
NCP1060
NCP1063
Figure 38. Ipk set−point is frozen at lower power demand.
0
100
200
300
400
500
600
700
800
900
40 50 60 70 80 90 100 110
Current set point [mA]
I
COMP
[mA]
NCP1060
NCP1063

NCP1063AP060G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers HV SWITCHER FOR LOW POWER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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