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NCP1063AP060G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31
NCP1060, NCP1063
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22
Figure 39. Ipk set−point is frozen at lower power demand (I
LMOP
≥ 285 mA)
0
50
100
150
200
250
300
350
40 50 60 70 80 90 100 110
Current set point [mA]
I
COMP
[mA]
NCP1060
NCP1063
Feedback and Skip
Figure 40 depicts the relationship between COMP pin
voltage and current. The COMP pin operates linearly as the
absolute value of COMP current (I
COMP
) is above 40 mA. In
this linear operating range, the dynamic resistance is
17.7 kW typically (R
COMP(up)
) and the effective pull up
voltage is 2.7 V typically (V
COMP(REF)
). When I
COMP
is
decreases, the COMP voltage will increase to 3.2 V.
Figure 40. COMP Pin Voltage vs. Current
0
0.5
1
1.5
2
2.5
3
3.5
-180 -160 -140 -120 -100 -80 -60 -40 -20 0
V
COMP
[V]
I
COMP
[μA]
Figure 41 depicts the skip mode block diagram. When the
COMP current information reaches I
COMPskip
, the internal
clock setting the flip−flop is blanked and the internal
consumption of the controller is decreased. The hysteresis of
internal skip comparator is minimized to lower the ripple of
the auxiliary voltage for V
CC
pin and V
OUT
of power supply
during skip mode. It easies the design of V
CC
over load
range.
NCP1060, NCP1063
www.onsemi.com
23
Jittering
OSC
Foldback
SKIP
CS comparator
DRV stage
COMP
S
R
Q
Q
V
COMP(REF)
R
COMP(UP)
I
COMPskip
Figure 41. Skip Cycle Schematic
Ilimit and OPP Function
The function makes the integrated circuit more flexible. The current drawn out of LIM/OPP pin defines the current set point.
Figure 42. Ipk set−point dependence on I
LMOP
current
0
100
200
300
400
500
600
700
800
900
0 50 100 150 200 250 300 350
Current set point [mA]
I
LMOP
[mA]
NCP1060
NCP1063
There are several known ways to implement Over Power
Protection (OPP), all suffering from particular problems.
These problems range from the added consumption burden
on the converter or the skip−cycle disturbance brought by
the current−sense offset. A way to reduce the power
capability at high line is to capitalize on the negative voltage
swing present on the auxiliary diode anode. During the
power switch on−time, this point dips to –NV
in
, N being the
turns ratio between the primary winding and the auxiliary
winding. The negative plateau on auxiliary winding will
have an amplitude dependant on the input voltage. Resistors
R
OPPU
and R
OPPL
(Figure 43) define current drawn from
LIM/OPP and the negative voltage on auxiliary winding.
The negative voltage is tied up with bulk voltage, so the
higher the bulk voltage is, the deeper is the negative voltage
on auxiliary winding, the higher current is drawn from
LIM/OPP pin and the lower the peak current is. During the
internal MOSFET off period, voltage on auxiliary winding
is positive, but the IC ignores the LIM/OPP current. The
positive LIM/OPP current has no influence on proper IC
function.
NCP1060, NCP1063
www.onsemi.com
24
S
R
Q
I
COMP
to CS setpoint
I
Freeze
I
pk(0)
Vramp + Vsense
OSC
I
LMOP
I
LMDEC
I
LMDEC
I
LMOP
0
25
mA
250
mA
IPKL
I
COMP
MOSFET
LIM/OPP
D4
C2
VCC
R
OPPU
R
OPPL
Aux
winding
Figure 43. The OPP Circuitry Affects the Maximum Peak Current Set Point
Ramp Compensation and Ipk Set−point
In order to allow the NCP106X to operate in CCM with a
duty cycle above 50%, a fixed slope compensation is
internally applied to the current−mode control.
Here we got a table of the ramp compensation, the initial
current set point, and the final current set−point of different
versions of switcher.
NCP1060 NCP1063
f
sw
60 kHz 100 kHz 60 kHz 100 kHz
S
a
8.4 mA/ms 14 mA/ms 15.6 mA/ms 26 mA/ms
I
pk(Duty
=50%)
250 mA 650 mA
I
pk(0)
300 mA 780 mA
Figure 44 depicts the variation of I
PK
set−point vs. the
power switcher duty ratio, which is caused by the internal
ramp compensation.
Figure 44. I
PK
set−point varies with power switch on time, which is caused by the ramp compensation.
0
100
200
300
400
500
600
700
800
900
0% 10% 20% 30% 40% 50% 60% 70%
Ipk set-point [mA]
Dutty Ratio [%]
NCP1060
NCP1063
FB Pin Function
The FB pin is used in non isolated SMPS application only.
Portion of the output voltage is connected into the pin. The
voltage is compared with internal V
REF
(3.3 V) using
Operation Transconductance Amplifier (Figure 45). The
OTAs output is connected to COMP pin. The OTA output is
accessible through the COMP pin and is used for the loop
compensation, usually an RC network. The current
capability of OTA is limited to −150 mA typically. The
positive current is defined by internal R
COMP(up)
resistor
and V
COMP(ref)
voltage. If FB path loop is broken (i.e. the FB
pin is disconnected), an internal current I
FB
(1 mA typ.) will
pull up the FB pin and the IC stops switching to avoid
uncontrolled output voltage increasing.
In isolated topology, the FB pin should be connected to
GND pin. In this configuration no current flows from OTA
to COMP pin (OTA is disabled) so the OTA has no influence
on regulation at all.
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NCP1063AP060G

Mfr. #:
Buy NCP1063AP060G
Manufacturer:
ON Semiconductor
Description:
Switching Controllers HV SWITCHER FOR LOW POWER
Lifecycle:
New from this manufacturer.
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