NCP81241
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Figure 3. Power Stage Typical Schematic
TP17
1
HG1
C2
10uF
12
+
C219
dnp
12
C3
10uF
12
C101
1nF
12
DRVL1
LG1
+
C220
dnp
12
JP14 ETCH
1 2
JP13 ETCH
1 2
+
C223
dnp
12
C201
10uF
12
Q4
NTMFS4852N
3 6
5
7
8
2
4
1
SWN1 {2}
CSN1 {2}
C212
22uF
12
+
C218
dnp
12
C213
22uF
12
+
8C20
DNP
12
+
C211
dnp
12
VDC
L1
560nH
MCP1040LR56C
1 2
Q2
NTMFS4821N
3 6
5
7
8
2
4
1
VCCU
C226
22uF
12
C4
0.22uF
12
R164 0.0
1 2
TP14
1
SW1
C227
22uF
12
C184
22uF
12
C185
22uF
12
C186
22uF
12
C187
22uF
1
B
2
ST1
HG1
SW1
LG1
C188
22uF
12
C183
22uF
12
C189
22uF
12
DRVH1
C190
22uF
12
C191
22uF
12
C192
22uF
12
VCCU
C222
22uF
12
C210
22uF
12
C43
22uF
12
C46
22uF
12
C45
22uF
12
C50
22uF
12
TP8
1
C47
22uF
12
SW1
C42
22uF
12
C194
22uF
12
C193
22uF
12
C177
22uF
12
C176
22uF
12
C1
10uF
12
NCP81241
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Figure 4. NCP81241 Pin Configurations
1
2
3
4
5
6
7
8 9 10 11 12 13 14
15
16
17
18
19
20
21
22232425262728
VCC
VSP
DIFFOUT
FB
COMP
ROSC
VSN
VBOOT
TSENSE
LG
PGND
SW
HG
BST
ILIM
IOUT
CSCOMP
CSSUM
CSREF
IMAX
PVCC
ENABLE
VR_HOT
SDIO
ALERT
SCLK
VR_RDY
VRMP
NCP81241
TAB: GROUND
Table 1. NCP81241 SINGLE ROW PIN DESCRIPTIONS
Pin No. Symbol Description
1 ENABLE Logic input. Logic high enables both outputs and logic low disables both outputs
2 VR_HOT# Thermal logic output for over temperature
3 SDIO Serial VID data interface
4 ALERT# Serial VID ALERT#.
5 SCLK Serial VID clock
6 VR_RDY Open drain output. High indicates that the output is regulating
7 VRMP Feed−forward input of Vin for the ramp slope compensation. The current fed into this pin is used to con-
trol the ramp of PWM slope
8 BST High−Side bootstrap supply for phase 1.
9 HG High side gate driver output for phase 1
10 SW Current return for high side gate driver 1
11 PGND Power Ground for gate driver
12 LG Low−Side gate driver output for phase 1
13 TSENSE Temp Sense input for the single phase converter
14 VBOOT/ADDR An input pin to adjust the boot−up voltage. During start up it is used to program VBOOT and SVID ad-
dress with a resistor to ground
15 PVCC Power Supply for gate driver, recommended decoupling 2.2uF
16 IMAX Imax Input Pin. During start up it is used to program IMAX with a resistor to ground
17 CSREF Total output current sense amplifier reference voltage input
18 CSSUM Inverting input of total current sense amplifier
19 CSCOMP Output of total current sense amplifier
20 IOUT Total output current monitor.
21 ILIM Over current shutdown threshold setting. Resistor to CSCOMP to set threshold
NCP81241
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Table 1. NCP81241 SINGLE ROW PIN DESCRIPTIONS
22 ROSC A resistance from this pin to ground programs the oscillator frequency
23 COMP Output of the error amplifier and the inverting input of the PWM comparator
24 FB Error amplifier voltage feedback
25 DIFFOUT Output of the differential remote sense amplifier
26 VSN Inverting input to differential remote sense amplifier
27 VSP Non−inverting input to the differential remote sense amplifier
28 Vcc Power for the internal control circuits. A 1uF decoupling capacitor is connected from this pin to ground
29 FLAG/GND
Table 2. ABSOLUTE MAXIMUM RATINGS
Pin Symbol V
MAX
V
MIN
Isource Isink
COMP VCC + 0.3 V −0.3 V 2 mA 2 mA
CSCOMP VCC + 0.3 V −0.3 V 2 mA 2 mA
VSN GND + 300 mV GND – 300 mV 1 mA 1 mA
DIFFOUT VCC + 0.3 V −0.3 V 2 mA 2 mA
VR_RDY VCC + 0.3 V −0.3 V N/A 2 mA
VCC 6.5 V −0.3 V N/A N/A
ROSC VCC + 0.3 V −0.3 V
IOUT 2.0 V −0.3 V
VRMP +25 V −0.3 V
SW 35 V
40 V 50 ns
−5 V
−10 V 200 ns
BST 35 V wrt/ GND
40 V 50 ns wrt/GND
6.5 V wrt/ SW
−0.3 V wrt/SW
LG VCC + 0.3 V −0.3 V
−5 V 200 ns
HG BST + 0.3 V −0.3 V wrt/ SW
−2 V 200 ns wrt/SW
All Other Pins VCC + 0.3 V −0.3 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*All signals referenced to GND unless noted otherwise.
Table 3. THERMAL INFORMATION
Thermal Characteristic
QFN Package (Note 1)
R
q
JA
68
_C/W
Operating Junction Temperature Range (Note 2) T
J
−10 to 125
_C
Operating Ambient Temperature Range T
A
−10 to 100
_C
Maximum Storage Temperature Range T
STG
−40 to +150
_C
Moisture Sensitivity Level
QFN Package
MSL 1
ESD Human Body Model HBM 2000 V
ESD Machine Model MM 200 V
ESD Charged Device Model CDM 1000 V
*The maximum package power dissipation must be observed.
1. JESD 51−5 (1S2P Direct−Attach Method) with 0 LFM
2. JESD 51−7 (1S2P Direct−Attach Method) with 0 LFM

NCP81241MNTXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Voltage Regulators INDUSTRIAL TEMPERATU
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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