Philips Semiconductors Product data
P89C660/P89C662/P89C664/
P89C668
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
2002 Oct 28
32
TIMER 0 AND TIMER 1 OPERATION
Timer 0 and Timer 1
The “Timer” or “Counter” function is selected by control bits C/T in
the Special Function Register TMOD (see Figure 15). These two
Timer/Counters have four operating modes, which are selected by
bit-pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same for
both Timers/Counters. Mode 3 is different. The four operating modes
are described in the following text.
Mode 0
Putting either Timer into Mode 0 makes it behave as an 8048 Timer,
which is an 8-bit Counter with a divide-by-32 prescaler. Figure 16
shows the Mode 0 operation.
In this mode, the Timer register is configured as a 13-bit register. As
the count rolls over from all 1s to all 0s, it sets the Timer interrupt
flag TFn. The counted input is enabled to the Timer when TRn = 1
and either GATE = 0 or INTn
= 1. TRn is a control bit in the Special
Function Register TCON (Figure 17). (Setting GATE = 1 allows the
Timer to be controlled by external input INTn
, to facilitate pulse width
measurements).
The 13-bit register consists of all 8 bits of THn and the lower 5 bits
of TLn. The upper 3 bits of TLn are indeterminate and should be
ignored. Setting the run flag (TRn) does not clear the registers.
Mode 0 operation is the same for Timer 0 as for Timer 1. There are
two different GATE bits, one for Timer 1 (TMOD.7) and one for Timer
0 (TMOD.3).
Mode 1
Mode 1 is the same as Mode 0, except that the Timer register is
being run with all 16 bits.
Mode 2
Mode 2 configures the Timer register as an 8-bit Counter (TLn) with
automatic reload, as shown in Figure 18. Overflow from TLn not only
sets TFn, but also reloads TLn with the contents of THn, which is
preset by software. The reload leaves THn unchanged.
Mode 2 operation is the same for Timer 0 as for Timer 1.
Mode 3
Timer 1 in Mode 3 simply holds its count. The effect is the same as
setting TR1 = 0.
Timer 0 in Mode 3 establishes TL0 and TH0 as two separate
counters. The logic for Mode 3 on Timer 0 is shown in Figure 19.
TL0 uses the Timer 0 control bits: C/T
, GATE, TR0, and TF0 as well
as pin INT0
. TH0 is locked into a timer function (counting machine
cycles) and takes over the use of TR1 and TF1 from Timer 1. Thus,
TH0 now controls the “Timer 1” interrupt.
Mode 3 is provided for applications requiring an extra 8-bit timer on
the counter. Putting Timer 0 in Mode 3 allows an 80C51 to have
three Timer/Counters. When Timer 0 is in Mode 3, Timer 1 can be
turned on and off by switching it out of and into its own Mode 3, or
can still be used by the serial port as a baud rate generator, or in
fact, in any application not requiring an interrupt.
GATE C/T M1
M0 GATE C/T
M1 M0
BIT SYMBOL FUNCTION
TMOD.3/ GATE Gating control when set. Timer/Counter “n” is enabled only while “INTn
” pin is high and
TMOD.7 “TRn” control pin is set. when cleared Timer “n” is enabled whenever “TRn” control bit is set.
TMOD.2/ C/T
Timer or Counter Selector cleared for Timer operation (input from internal system clock.)
TMOD.6 Set for Counter operation (input from “Tn” input pin).
M1 M0 OPERATING
0 0 8048 Timer: “TLn” serves as 5-bit prescaler.
0 1 16-bit Timer/Counter: “THn” and “TLn” are cascaded; there is no prescaler.
1 0 8-bit auto-reload Timer/Counter: “THn” holds a value which is to be reloaded
into “TLn” each time it overflows.
1 1 (Timer 0) TL0 is an 8-bit Timer/Counter controlled by the standard Timer 0 control bits.
TH0 is an 8-bit timer only controlled by Timer 1 control bits.
1 1 (Timer 1) Timer/Counter 1 stopped.
SU01580
TIMER 1 TIMER 0
Not Bit Addressable
TMOD Address = 89H Reset Value = 00H
76543 2 1 0
Figure 15. Timer/Counter 0/1 Mode Control (TMOD) Register
