DS28CZ04: 4Kb I²C/SMBus EEPROM with Nonvolatile PIO
19 of 22
Figure 10A. PIO Read Access Timing, A1 devices
Normal Read, A1 Parts
MSB DATA1 LSB A MSB DATA2 LSB A MSB DATA3 LSB A
DATA1 DATA2 DATA4DATA3 DATA5
t
PS
t
PH
Sampling
Sampling Sampling
Note: DATA1 was sampled during the transmission of data from address 7Ah, or, if
reading started at memory address 7Bh, during the transmission of the slave address.
PIO
SCL
SD
MSB (7Bh) data LSB A
PIO Direct, A1 Parts
S A6 A5 A4 A3 A2 A1 P0 1 A MSB DATA1 LSB A MSB DATA2 LSB A MSB DATA3 LSB A
t
PS
t
PH
Sampling
Sampling Sampling
Note: DATA1 was sampled during the transmission of the slave address of a preceding read or write access.
PIO
SCL
SD
DATA1 DATA2
DATA4
DATA3
DATA5
I²C/SMBus Communication—Legend
SYMBOL DESCRIPTION SYMBOL DESCRIPTION
S START Condition xx0xx1xxb Byte that defines specific bits only
ADL,0 Select for Write Access to lower half P STOP Condition
ADH,0 Select for Write Access to upper half A\ Not Acknowledged
ADX,1 Select for Read Access <byte> Transfer of 1 Byte
ADX,0 Select for Write access AMA Any 8-bit Memory Address
A Acknowledged Sr Repeated START Condition
Command-Specific Communication⎯Color-Codes
Master-to-Slave Slave-to-Master Programming
Communication Examples
Set I²C mode, write 3 bytes starting at address 25h, lower half of the memory, test for end of cycle
S ADL,0 A 7Ah A x0xxxxxxb A P
S ADL,0 A 25h A <byte> A P Programming
S ADX,0 A\ Sr ADX,0 A\ Sr ADX,0 A P
Repeat this sequence; when cycle is completed, the DS28CZ04 will acknowledge.
Write 3 bytes
Set I²C bus mode; optional step;
I²C bus mode is the power-on
default.