XR68C92/192
25
Rev. 1.33
ABSOLUTE MAXIMUM RATINGS
Supply range 7 Volts
Voltage at any pin GND - 0.3 V to VCC +0.3 V
Operating temperature -40° C to +85° C
Storage temperature -65° C to 150° C
Package dissipation 500 mW
DC ELECTRICAL CHARACTERISTICS FOR XR68C92 AND XR68C192
T
A
=0° - 70°C (-40° - +85°C for Industrial grade packages), Vcc=3.3 - 5.0 V ± 10% unless otherwise specified.
V
ILCK
Clock input low level -0.3 0.6 -0.5 0.6 V
V
IHCK
Clock input high level 2.4 VCC 3.0 VCC V
(Devices with top marking of "CC" and older)
V
IHCK
Clock input high level 2.4 5.5 3.0 5.5 V
(Devices with top marking of "D2" and newer)
V
IL
Input low level -0.3 0.8 -0.5 0.8 V
V
IH
Input high level 2.0 VCC 2.2 VCC V
(Devices with top marking of "CC" and older)
V
IH
Input high level 2.0 5.5 2.2 5.5 V
(Devices with top marking of "D2" and newer)
V
OL
Output low level on all outputs 0.4 V I
OL
= 8 mA
V
OL
Output low level on all outputs 0.4 V I
OL
= 5 mA
V
OH
Output high level 2.4 V I
OH
= -8 mA
V
OH
Output high level 2.4 V I
OH
= -1 mA
I
IL
Input leakage ±10 ±10 µA
I
CL
Clock leakage ±10 ±10 µA
I
CC
Avg power supply current 1.0* 1.5* mA
I
PD
Avg power-down supply current (68C92) 100* 150* µA
I
PD
Avg power-down supply current (68C192) 200* 300* µA
C
P
Input capacitance 5 5 pF
Symbol Parameter Limits Limits Units Conditions
3.3 5.0
Min Max Min Max
*All inputs tied to VCC/GND.
XR68C92/192
26
Rev. 1.33
AC ELECTRICAL CHARACTERISTICS
T
A
=0° - 70°C (-40° - +85°C for Industrial grade packages), Vcc=3.3 - 5.0 V ± 10% unless otherwise specified.
T1w,T2w Clock pulse duration 17 17 ns
T
3w Oscillator/Clock frequency 8 24 MHz
T
AS Address Valid to -CS Low 0 0 ns
TAH -CS High to Address Invalid 0 0 ns
TRWS R/-W Setup Time to -CS Low 0 0 ns
TRWH R/-W Hold Time from -CS High 0 0 ns
TDD -CS/-IACK Low to Data Valid (Read) 51 32 ns
TDS Data Valid to -CS High (Write) 20 10 ns
TDH -CS High to Data Invalid (Write) 1 1 ns
TDF -CS/-IACK High to Data Hi-Z (Read) 30 20 ns
TCSL -CS Low Pulse Width 100 70 ns
TCSH -CS High Pulse Width 100 70 ns
T
AKL
-CS/-IACK Low to -DACK Low 70 42 ns
T
AKH
-CS/-IACK High to -DACK High 45 27 ns
T
AKT
-CS/-IACK High to -DACK Hi-Z 70 43 ns
T9s Port input setup time 0 0 ns
T9h Port input hold time 0 0 ns
T10d Delay from R/-W to output 110 110 ns
T11d Delay to reset interrupt from -CS 100 100 ns
TR Reset pulse width 2 2 clks*
N Baud rate divisor 1 2
16
-1 1 2
16
-1 N/A
* number of input clock (crystal or external clock) periods
Symbol Parameter Limits Limits Units Conditions
3.3 5.0
Min Max Min Max
XR68C92/192
27
Rev. 1.33
Figure 3: Bus Timing (Read/Write cycle)
Read Cycle Timing
Write Cycle Timing
A4-A1
-CS
D7-D0
R/-W
-DACK
T
AS
T
AH
T
RWS
T
RWH
T
DD
T
AKH
T
AKL
T
AKT
A4-A1
-CS
D7-D0
R/-W
-DACK
T
AS
T
AH
T
RWS
T
RWH
T
AKH
T
AKL
T
CSL
T
CSH
T
CSL
T
CSH
Valid Data
T
DH
T
DS
T
AKT
T
DF

XR68C92IVTR-F

Mfr. #:
Manufacturer:
MaxLinear
Description:
UART Interface IC XR68C92IVTR-F
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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