Features
Incorporates the ARM7TDMI
®
ARM
®
Thumb
®
Processor Core
High-performance 32-bit RISC Architecture
High-density 16-bit Instruction Set
Leader in MIPS/Watt
Embedded ICE (In-circuit Emulation)
256K Bytes of On-chip SRAM
32-bit Data Bus, Single-clock Cycle Access
1024K Words 16-bit Flash Memory (2M bytes)
Single Voltage Read/Write,
Sector Erase Architecture
Dual-plane Organization Allows Concurrent Read and Program/Erase
Erase Suspend Capability
Low-power Operation
Data Polling, Toggle Bit and Ready/Busy End of Program Cycle Detection
Reset Input for Device Initialization
Sector Program Unlock Command
128-bit Protection Register
Factory-programmed AT91 Flash Uploader Software
Fully Programmable External Bus Interface (EBI)
Up to 8 Chip Selects, Maximum External Address Space of 64M Bytes
Software Programmable 8/16-bit External Data Bus
8-level Priority, Individually Maskable, Vectored Interrupt Controller
4 External Interrupts, Including a High-priority Low-latency Interrupt Request
32 Programmable I/O Lines
3-channel 16-bit Timer/Counter
3 External Clock Inputs, 2 Multi-purpose I/O Pins per Channel
2 USARTs
2 Dedicated Peripheral Data Controller (PDC) Channels per USART
Programmable Watchdog Timer
Advanced Power-saving Features
CPU and Peripherals Can be De-activated Individually
Fully Static Operation:
0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85°C
2.7V to 3.6V I/O Operating Range, 1.65V to 1.95V Core Operating Range
-40°C to 85°C Temperature Range
Available in a 121-ball 10 x 10 x 1.2 mm BGA Package with 0.8 mm Ball Pitch
1. Description
The AT91FR40162 is a member of the Atmel AT91 16/32-bit Microcontroller family,
which is based on the ARM7TDMI processor core. The processor has a high-perfor-
mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low
power consumption.
The AT91FR40162 ARM microcontroller features 2 Mbits of on-chip SRAM and 2
Mbytes of Flash memory in a single compact 121-ball BGA package. Its high level of
integration and very small footprint make the device ideal for space-constrained appli-
cations. The high-speed on-chip SRAM enables a performance of up to 74 MIPs in
typical conditions with significant power reduction and EMC improvement over an
external SRAM implementation.
The Flash memory may be programmed via the JTAG/ICE interface or the factory-
programmed Flash Uploader using a single device supply, making the AT91FR40162
suitable for in-system programmable applications.
AT91 ARM
®
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®
Microcontrollers
AT91FR40162
2632D-ATARM-15-Sep-05
2
2632D–ATARM–15-Sep-05
AT91FR40162
2. Pin Configuration
Figure 2-1. AT91FR40162 Pinout for 121-ball BGA Package (Top View)
K
J
H
G
F
E
D
C
B
A
L
1110987654321
P19 P16 GND
P11
IRQ2
VDDCORE
P8
TIOB2
P6
TCLK2
P21/TXD1
NTRI
P2
TIOB0
P20
SCK1
P18 P17
P12
FIQ
P10
IRQ1
VDDIO
P7
TIOA2
P4
TIOA1
GND
P1
TIOA0
GND
NUB
NWR1
P14
TXD0
NBUSY P9
IRQ0
P5
TIOB1
P3
TCLK1
A16
P15
RXD0
P0
TCLK0
MCKI NRST
P13
SCK0
D12 D14 VDDIO
P25
MCK0
NWDOVF A3 NC NC D3
TMS GND TCK D8 NC NC
NWE
NWR0
A2 TDI D6 GND NC
VDDCORE VDDIO NC
P31/A23
CS4
NC NC
GND
P27
NCS3
A5 A19 VDDIO
P30/A22
CS5
NLB
A0
GND A7 A17
P29/A21
CS6
VDDCORE
A1 A4 A6 VDDIO A18
A20
VPP NRSTF A14 A15
A8 D11 D10 D13
NOE
NRD
A11 D7
NCS0 D2 D5 D4
NCSF NC D0 D1
NC VDDIO GND GND
VDDIO A10 A13 GND
VDDIO A9 A12 GND
P22
RXD1
VDDIO
P23
P24
BMS
GND
TDO
P26
NCS2
NWAIT
NCS1
GND
D9
GND
D15
A1 Corner
3
2632D–ATARM–15-Sep-05
AT91FR40162
3. Pin Description
Table 3-1. AT91FR40162 Pin Description
Module Name Function Type
Active
Level Comments
EBI
A0 - A23 Address Bus Output
Valid after reset; do not reprogram A20 to
I/O, as it is MSB of Flash address
D0 - D15 Data Bus I/O
NCS0 - NCS3 External Chip Select Output Low Used to select external devices
CS4 - CS7 External Chip Select Output High A23 - A20 after reset
NWR0 Lower Byte 0 Write Signal Output Low Used in Byte Write option
NWR1 Upper Byte 1 Write Signal Output Low Used in Byte Write option
NRD Read Signal Output Low Used in Byte Write option
NWE Write Enable Output Low Used in Byte Select option
NOE Output Enable Output Low Used in Byte Select option
NUB Upper Byte Select Output Low Used in Byte Select option
NLB Lower Byte Select Output Low Used in Byte Select option
NWAIT Wait Input Input Low
BMS Boot Mode Select Input
Sampled during reset; must be driven low
during reset for Flash to be used as boot
memory
AIC
FIQ Fast Interrupt Request Input PIO-controlled after reset
IRQ0 - IRQ2 External Interrupt Request Input PIO-controlled after reset
Timer
TCLK0 - TCLK2 Timer External Clock Input PIO-controlled after reset
TIOA0 - TIOA2 Multi-purpose Timer I/O Pin A I/O PIO-controlled after reset
TIOB0 - TIOB2 Multi-purpose Timer I/O Pin B I/O PIO-controlled after reset
USART
SCK0 - SCK1 External Serial Clock I/O PIO-controlled after reset
TXD0 - TXD1 Transmit Data Output Output PIO-controlled after reset
RXD0 - RXD1 Receive Data Input Input PIO-controlled after reset
PIO P0 - P31 Parallel IO Line I/O
WD NWDOVF Watchdog Overflow Output Low Open drain
Clock
MCKI Master Clock Input Input Schmidt trigger
MCKO Master Clock Output Output
Reset
NRST Hardware Reset Input Input Low Schmidt trigger
NTRI Tri-state Mode Select Input Low Sampled during reset
ICE
TMS Test Mode Select Input Schmidt trigger, internal pull-up
TDI Test Data Input Input Schmidt trigger, internal pull-up
TDO Test Data Output Output
TCK Test Clock Input Schmidt trigger, internal pull-up

AT91FR40162-CI

Mfr. #:
Manufacturer:
Description:
IC MCU 16/32BIT 2MB FLASH 121BGA AT91
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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