SL28541
......................DOC #: SP-AP-0063 (Rev. AA) Page 19 of 31
PCI_STP# Assertion
The PCI_STP# signal is an active LOW input used for
synchronously stopping and starting the PCI outputs while the
rest of the clock generator continues to function. The set-up
time for capturing PCI_STP# going LOW is 10 ns (t
SU
). (See
Figure 6.) The PCIF clocks are affected by this pin if their
corresponding control bit in the SMBus register is set to allow
them to be free running.
PCI_STP# Deassertion
The deassertion of the PCI_STP# signal causes all PCI and
stoppable PCIF clocks to resume running in a synchronous
manner within two PCI clock periods, after PCI_STP# transi-
tions to a HIGH level.
.
. .
CPU_STP#
CPUT
CPUC
CPUT Internal
Tdrive_CPU_STP#,10 ns>200 mV
CPUC Internal
Figure 5. CPU_STP# Deassertion Waveform
Tsu
PCI_STP#
PCI_F
PCI
SRC 100MHz
Figure 6. PCI_STP# Assertion Waveform
PCI_STP#
PCI_F
PCI
SRC 100MHz
Tsu
Tdrive_SRC
Figure 7. PCI_STP# Deassertion Waveform
SL28541
......................DOC #: SP-AP-0063 (Rev. AA) Page 20 of 31
Figure 8. Clock Generator Power up/Run State Diagram
FSC
FSB FSA
Off
Latches Open
M1
T_delay3
Off
Off
3.3V
T_delay t
Clock Off to M1
CPU_STP#
PCI_STP#
Vcc
CKPWRGD/PD#
CK505 SMBUS
CK505 State
BSEL[0..2]
CK505 Core Logic
PLL1
CPU1
PLL2 & PLL3
All Other Clocks
REF Oscillator
T_delay2
Locked
2.0V
Figure 9. BSEL Serial Latching
SL28541
......................DOC #: SP-AP-0063 (Rev. AA) Page 21 of 31
Absolute Maximum Conditions
Parameter Description Condition Min. Max. Unit
V
DD_3.3V
Supply Voltage Functional 4.6 V
V
DD_IO
IO Supply Voltage Functional 3.465 V
V
IN
Input Voltage Relative to V
SS
–0.5 4.6 V
DC
T
S
Temperature, Storage Non-functional –65 150 °C
T
A
Commercial Temperature,
Operating Ambient
Functional 0 85 °C
Industrial Temperature,
Operating Ambient
-40 +85 °C
T
J
Temperature, Junction Functional 150 °C
Ø
JC
Dissipation, Junction to Case JEDEC (JESD 51) 20
°C/W
Ø
JA
Dissipation, Junction to Ambient JEDEC (JESD 51) 60 °C/
W
ESD
HBM
ESD Protection (Human Body
Model)
JEDEC (JESD 22-A114) 2000 V
UL-94 Flammability Rating UL (CLASS) V–0
MSL Moisture Sensitivity Level 1
Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
DC Electrical Specifications
Parameter Description Condition Min. Max. Unit
VDD core 3.3V Operating Voltage 3.3 ± 5% 3.135 3.465 V
V
IH
3.3V Input High Voltage (SE) 2.0 V
DD
+ 0.3 V
V
IL
3.3V Input Low Voltage (SE) V
SS
– 0.3 0.8 V
V
IHI2C
Input High Voltage SDATA, SCLK 2.2 V
V
ILI2C
Input Low Voltage SDATA, SCLK 1.0 V
V
IH_FS
FS_[A,B] Input High Voltage 0.7 1.5 V
V
IL_FS
FS_[A,B] Input Low Voltage V
SS
– 0.3 0.35 V
V
IHFS_C_TEST
FS_C Input High Voltage 2 V
DD
+ 0.3 V
V
IMFS_C_NORMAL
FS_C Input Middle Voltage 0.7 1.5 V
V
ILFS_C_NORMAL
FS_C Input Low Voltage V
SS
– 0.3 0.35 V
I
IH
Input High Leakage Current Except internal pull-down resistors, 0 < V
IN
< V
DD
–5A
I
IL
Input Low Leakage Current Except internal pull-up resistors, 0 < V
IN
< V
DD
–5 A
V
OH
3.3V Output High Voltage (SE) I
OH
= –1 mA 2.4 V
V
OL
3.3V Output Low Voltage (SE) I
OL
= 1 mA 0.4 V
V
DD IO
Low Voltage IO Supply Voltage 1 3.465 V
I
OZ
High-impedance Output
Current
–10 10 A
C
IN
Input Pin Capacitance 1.5 5 pF
C
OUT
Output Pin Capacitance 6pF
L
IN
Pin Inductance 7 nH
V
XIH
Xin High Voltage 0.7V
DD
V
DD
V
V
XIL
Xin Low Voltage 0 0.3V
DD
V
IDD
PWRDWN
Power Down Current 1mA
I
DD
Dynamic Supply Current 250 mA

SL28541BZC

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Generators & Support Products Montevina
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union