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M48T201V-85MH1F

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P37
M48T201Y, M48T201V Description
7/37
Table 1. Signal names
A0-A18 Address inputs
DQ0-DQ7 Data inputs / outputs
RSTIN1 Reset 1 input
RSTIN2 Reset 2 Input
RST Reset output (open drain)
WDI Watchdog input
E Chip enable input
G Output enable Input
W WRITE enable input
E
CON
RAM chip enable output
G
CON
RAM enable output
IRQ/FT Interrupt / frequency test output (open drain)
SQW Square wave output
V
OUT
Supply voltage output
V
CC
Supply voltage
V
SS
Ground
NC Not connected internally
Description M48T201Y, M48T201V
8/37
Figure 2. SOIC connections
A1
A0
NC
A4
RST
WDI
A2
A3
A9
A10
A11
G
DQ7
A17
IRQ/FT
NC
E
DQ6
DQ1
DQ3
V
SS
DQ4
A13
V
OUT
A12
A5
A14
V
CC
A6
AI02241
M48T201Y
M48T201V
8
2
3
4
5
6
7
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
2322
20
19
18
17
G
CON
DQ0
A18
A16
SQW
NC
44
39
38
37
36
35
34
33
A15
A8
DQ2 21
DQ5
40
43
1
42
41
A7
W
RSTIN2
RSTIN1
E
CON
M48T201Y, M48T201V Description
9/37
Figure 3. Hardware hookup
1. If the second chip enable pin (E2) is unused, it should be tied to V
OUT
.
AI00604
32,768 Hz
CRYSTAL
LITHIUM
CELL
A0-A18
DQ0-DQ7
E
V
CC
W
G
WDI
RSTIN1
RSTIN2
V
SS
E
E2
(1)
W
G
V
CC
V
SS
A0-Axx
DQ0-DQ7
0.1μF
0.1μF
5V
ECON
GCON
RST
IRQ/FT
SQW
M48T201Y/V
CMOS
SRAM
V
OUT
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P37

M48T201V-85MH1F

Mfr. #:
Buy M48T201V-85MH1F
Manufacturer:
STMicroelectronics
Description:
Supervisory Circuits SRAM TK Controller
Lifecycle:
New from this manufacturer.
Delivery:
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