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MT41K256M8HX-187E:D

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
Table 19: Single-Ended Output Driver Characteristics
Gray-shaded cells have the same values as those in the 1.5V DDR3 data sheet
Parameter/Condition Symbol Min Max Units
Output slew rate: Single-ended; For rising and falling
edges, measure between V
OL(AC)
= V
REF
- 0.09 × V
DDQ
and V
OH(AC)
= V
REF
+0.09 × V
DDQ
SRQ
se
1.75 6 V/ns
Table 20: Differential Output Driver Characteristics
Gray-shaded cells have the same values as those in the 1.5V DDR3 data sheet
Parameter/Condition Symbol Min Max Units
Output slew rate: Differential; For rising and falling
edges, measure between V
OL,diff(AC)
= –0.18 × V
DDQ
and
V
OH,diff(AC)
= +0.18 × V
DDQ
SRQ
diff
3.5 12 V/ns
Output differential crosspoint voltage V
OX(AC)
V
REF
- 135 V
REF
+ 135 mV
Table 21: Electrical Characteristics and AC Operating Conditions
Parameter Symbol
DDR3L-800 DDR3L-1066 DDR3L-1333 DDR3L-1600
UnitsMin Max Min Max Min Max Min Max
DQ Input Timing
Data setup time
to DQS, DQS#
Base
(specification)
t
DS
(AC160)
90
–
40
–
N/A
–
N/A
–
ps
V
REF
@ 1 V/ns 250
–
200
–
N/A
–
N/A
–
ps
Data setup time
to DQS, DQS#
Base
(specification)
t
DS
(AC135)
140
–
90
–
45
–
25
–
ps
V
REF
@ 1 V/ns 275
–
225
–
180
–
160
–
ps
Data hold time
from DQS, DQS#
Base
(specification)
t
DH
(DC90)
160
–
110
–
75
–
55
–
ps
V
REF
@ 1 V/ns 250
–
200
–
165
–
145
–
ps
Command and Address Timing
CTRL, CMD,
ADDR setup to
CK, CK#
Base
(specification)
t
IS
(AC160)
215
–
140
–
80
–
60
–
ps
V
REF
@ 1 V/ns 375
–
300
–
240
–
220
–
ps
CTRL, CMD,
ADDR setup to
CK, CK#
Base
(specification)
t
IS
(AC135)
365
–
290
–
205
–
185
–
ps
V
REF
@ 1 V/ns 500
–
425
–
340
–
320
–
ps
CTRL, CMD,
ADDR hold from
CK, CK#
Base
(specification)
t
IH
(DC90)
285
–
210
–
150
–
130
–
ps
V
REF
@ 1 V/ns 375
–
300
–
240
–
220
–
ps
2Gb: x4, x8, x16 DDR3L SDRAM Addendum
Electrical Specifications
PDF: 09005aef83ed2952
2Gb_1_35V_DDR3L.pdf - Rev. E 1/11 EN
19
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2010 Micron Technology, Inc. All rights reserved.
Table 22: Derating Values for
t
IS/
t
IH – AC160/DC90-Based
Δ
t
IS, Δ
t
IH Derating (ps) – AC/DC-Based
CMD/ADDR
Slew Rate
V/ns
CK, CK# Differential Slew Rate
4.0 V/ns 3.0 V/ns 2.0 V/ns 1.8 V/ns 1.6 V/ns 1.4 V/ns 1.2 V/ns 1.0 V/ns
Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH
2.0 80 45 80 45 80 45 88 53 96 61 104 69 112 79 120 95
1.5 53 30 53 30 53 30 61 38 69 46 77 54 85 64 93 80
1.0 0 0 0 0
0 0
8 8 16 16 24 24 32 34 40 50
0.9 –1 –3 –1 –3
–1 –3
7 5 15 13 23 21 31 31 39 47
0.8 –3 –8 –3 –8 –3 –8 5 1 13 9 21 17 29 27 37 43
0.7 –5 –13 –5 –13 –5 –13 3 –5 11 3 19 11 27 21 35 37
0.6 –8 –20 –8 –20 –8 –20 0 –12 8 –4 16 4 24 14 32 30
0.5 –20 –30 –20 –30 –20 –30 –12 –22 –4 –14 4 –6 12 4 20 20
0.4 –40 –45 –40 –45 –40 –45 –32 –37 –24 –29 –16 –21 –8 –11 0 5
Table 23: Derating Values for
t
IS/
t
IH – AC135/DC90-Based
Δ
t
IS, Δ
t
IH Derating (ps) – AC/DC-Based
CMD/ADDR
Slew Rate
V/ns
CK, CK# Differential Slew Rate
4.0 V/ns 3.0 V/ns 2.0 V/ns 1.8 V/ns 1.6 V/ns 1.4 V/ns 1.2 V/ns 1.0 V/ns
Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH Δ
t
IS Δ
t
IH
2.0 68 45 68 45 45 45 76 53 84 61 92 69 100 79 108 95
1.5 45 30 45 30 30 30 53 38 61 46 69 54 77 64 85 80
1.0 0 0 0 0
0 0
8 8 16 16 24 24 32 34 40 50
0.9 2 –3 2 –3
2 –3
10 5 18 13 26 21 34 31 42 47
0.8 3 –8 3 –8 3 –8 11 1 19 9 27 17 35 27 43 43
0.7 6 –13 6 –13 6 –13 14 –5 22 3 30 11 38 21 46 37
0.6 9 –20 9 –20 9 –20 17 –12 25 –4 33 4 41 14 49 30
0.5 5 –30 5 –30 5 –30 13 –22 21 –14 29 –6 37 4 45 20
0.4 –3 –45 –3 –45 –3 –45 6 –37 14 –29 22 –21 30 –11 38 5
Table 24: Required Time
t
VAC Above V
IH(AC)
(Below V
IL[AC]
) for Valid ADD/CMD Transition
Slew Rate (V/ns)
t
VAC at 160mV (ps)
t
VAC at 135mV (ps)
>2.0 70 209
2.0 53 198
1.5 47 194
1.0 35 186
0.9 31 184
0.8 26 181
2Gb: x4, x8, x16 DDR3L SDRAM Addendum
Electrical Specifications
PDF: 09005aef83ed2952
2Gb_1_35V_DDR3L.pdf - Rev. E 1/11 EN
20
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2010 Micron Technology, Inc. All rights reserved.
Table 24: Required Time
t
VAC Above V
IH(AC)
(Below V
IL[AC]
) for Valid ADD/CMD Transition (Contin-
ued)
Slew Rate (V/ns)
t
VAC at 160mV (ps)
t
VAC at 135mV (ps)
0.7 20 177
0.6 12 171
0.5 0 164
<0.5 0 164
Table 25: Derating Values for
t
DS/
t
DH – AC160/DC90-Based
Δ
t
DS, Δ
t
DH Derating (ps) – AC/DC-Based
DQ Slew
Rate V/ns
DQS, DQS# Differential Slew Rate
4.0 V/ns 3.0 V/ns 2.0 V/ns 1.8 V/ns 1.6 V/ns 1.4 V/ns 1.2 V/ns 1.0 V/ns
Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH
2.0 80 45 80 45 80 45
1.5 53 30 53 30 53 30 61 38
1.0 0 0 0 0
0 0
8 8 16 16
0.9 –1 –3
–1 –3
7 5 15 13 23 21
0.8 –3 –8 5 1 13 9 21 17 29 27
0.7 –3 –5 11 3 19 11 27 21 35 37
0.6 8 –4 16 4 24 14 32 30
0.5 4 6 12 4 20 20
0.4 –8 –11 0 5
Table 26: Derating Values for
t
DS/
t
DH – AC135/DC90-Based
Δ
t
DS, Δ
t
DH Derating (ps) – AC/DC-Based
DQ Slew
Rate V/ns
DQS, DQS# Differential Slew Rate
4.0 V/ns 3.0 V/ns 2.0 V/ns 1.8 V/ns 1.6 V/ns 1.4 V/ns 1.2 V/ns 1.0 V/ns
Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH Δ
t
DS Δ
t
DH
2.0 68 45 68 45 68 45
1.5 45 30 45 30 45 30 53 38
1.0 0 0 0 0
0 0
8 8 16 16
0.9 2 –3
2 –3
10 5 18 13 26 21
0.8 3 –8 11 1 19 9 27 17 35 27
0.7 14 –5 22 3 30 11 38 21 46 37
0.6 25 –4 33 4 41 14 49 30
0.5 39 –6 37 4 45 20
0.4 30 –11 38 5
2Gb: x4, x8, x16 DDR3L SDRAM Addendum
Electrical Specifications
PDF: 09005aef83ed2952
2Gb_1_35V_DDR3L.pdf - Rev. E 1/11 EN
21
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2010 Micron Technology, Inc. All rights reserved.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23

MT41K256M8HX-187E:D

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Description:
IC DRAM 2G PARALLEL 78FBGA
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