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LTC3867IUF#PBF

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LTC3867
19
3867f
After determining the components for the temperature
compensation network, check the results by plotting I
MAX
versus inductor temperature using the following equations:
I
MAX
=
V
SENSEMAX(ADJ)
– ∆V
SENSE
/ 2
DCR(MAX) at 25°C• 1+ T
L(MAX)
– 25°C
( )
• 0.4 / 100
( )
where:
V
SENSEMAX(ADJ)
= V
SENSE(MAX)
•
1.8V –
V
ITEMP
2.8
1.3
– A
V
ITEMP
= 30µA • R
S
+R
P
||R
NTC
( )
Use typical values for V
SENSE(MAX)
. Subtracting constant
A will provide a minimum value for V
SENSE(MAX)
. These
values are summarized in Table 1.
Table 1
I
LIM
GND FLOAT INTV
CC
V
SENSE(MAX)
TYP 30mV 50mV 75mV
A 5mV 5mV 7mV
The resulting current limit should be greater than or equal
to I
MAX
for inductor temperatures between 25°C and 100°C.
These are typical values for the NTC compensation network:
• NTC R
O
= 100k, B-constant = 3000 to 4000
• R
S
≈ 20k
• R
P
≈ 50k
Generating the I
MAX
versus inductor temperature curve plot
first using the above values as a starting point and then
adjusting the R
S
and R
P
values as necessary is another
approach. Figure 7 shows a typical curve of I
MAX
versus
inductor temperature.
The same thermistor network can be used to correct for
temperatures less than 25°C. But make sure V
ITEMP
is
greater than 0.6V for duty cycles of 25% or more, oth-
erwise temperature correction may not occur at elevated
ambients. For the most accurate temperature detection,
place the thermistors next to the inductor as shown in
Figure 8. Take care to keep the ITEMP pin away from the
switch nodes.
APPLICATIONS INFORMATION
Figure 6. Resistance Versus Temperature for the ITEMP Pin
Network and the 100k NTC
Figure 7. Worst-Case I
MAX
Versus Inductor Temperature Curve
with and without NTC Temperature Compensation
Figure 8. Thermistor Location. Place Thermistor Next to
Inductor for Accurate Sensing of the Inductor Temperature,
But Keep the ITEMP Pin Away from the Switch Nodes and Gate
Drive Traces
INDUCTOR TEMPERATURE (°C)
10
RESISTANCE (kΩ)
100
1000
10000
–40 20 40 60 10080 120
1
–20 0
3867 F06
THERMISTOR RESISTANCE
R
O
= 100k
T
O
= 25°C
B = 4334 FOR 25°C/100°C
R
ITMP
R
S
= 20k
R
P
= 43.2k
100k NTC
INDUCTOR TEMPERATURE (°C)
–40
I
MAX
(A)
15
20
25
20 60 120
3867 F07
10
5
0
–20 0
40
80 100
CORRECTED
I
MAX
NOMINAL
I
MAX
UNCORRECTED
I
MAX
R
S
= 20k
R
P
= 43.2k
NTC THERMISTOR:
R
O
= 100k
T
O
= 25°C
B = 4334
V
OUT
R
NTC
L1
SW1
3867 F08
LTC3867
20
3867f
Pre-Biased Output Start-Up
There may be situations that require the power supply to
start up with a pre-bias on the output capacitors. In this
case, it is desirable to start up without discharging that
output pre-bias. The LTC3867 can safely power up into a
pre-biased output without discharging it.
The LTC3867 accomplishes this by disabling both TG and
BG until the TK/SS pin voltage and the internal soft-start
voltage are above the V
FB
pin voltage. When V
FB
is higher
than TK/SS or the internal soft-start voltage, the error amp
output is railed low. The control loop would like to turn
BG on, which would discharge the output. Disabling BG
and TG prevents the pre-biased output voltage from being
discharged. When TK/SS and the internal soft-start both
cross 500mV or V
FB
, whichever is lower, TG and BG are
enabled. If the pre-bias is higher than the OV threshold
however, the bottom gate is turned on immediately to pull
the output back into the regulation window.
Overcurrent Fault Recovery
When the output of the power supply is loaded beyond
its preset current limit, the regulated output voltage
will collapse depending on the load. The output may be
shorted to ground through a very low impedance path or
it may be a resistive short, in which case the output will
collapse partially, until the load current equals the preset
current limit. The controller will continue to source current
into the short. The amount of current sourced depends
on the I
LIM
pin setting and the V
FB
voltage as shown in
the Current Foldback graph in the Typical Performance
Characteristics section.
Upon removal of the short, the output soft starts using
the internal soft-start, thus reducing output overshoot. In
the absence of this feature, the output capacitors would
have been charged at current limit, and in applications
with minimal output capacitance this may have resulted
in output overshoot. Current limit foldback is not disabled
during an overcurrent recovery. The load must step below
the folded back current limit threshold in order to restart
from a hard short.
Thermal Protection
Excessive ambient temperatures, loads and inadequate
airflow or heat sinking can subject the chip, inductor,
FETs etc. to high temperatures. This thermal stress re-
duces component life and if severe enough, can result
in immediate catastrophic failure. To protect the power
supply from undue thermal stress, the LTC3867 has a
fixed chip temperature-based thermal shutdown and an
external inductor temperature-based thermal shutdown
that is adjustable. The internal thermal shutdown is set
for 160°C with 10°C of hysteresis. When the chip reaches
160°C, both TG and BG are disabled until the chip cools
down below 150°C.
In addition, the ITSD pin sources 20µA of current. By plac-
ing a Murata PRF18 series PTC thermistor between this
pin and ground, close to the inductor, the top and bottom
FET can be turned off when the inductor reaches a pre-set
temperature. The Murata PRF18 series PTC thermistors
have a typical resistance of 470Ω at room temperature.
Their temperature dependence is nonlinear. Over a fairly
narrow temperature range, the resistance changes a few
orders of magnitude. The LTC3867 trips when the PTC
resistance is at about 47k. The PRF18 series includes
thermistors with different trip points—select one based
on the shutdown temperature desired. Please refer to the
Murata data sheets for more details regarding the PRF18
series PTC thermistors.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant frequen-
cy current mode architectures by preventing sub-harmonic
oscillation at high duty cycles. It is accomplished internally
by adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles greater than 40%. However, the LTC3867
uses a scheme that counteracts this compensating ramp,
which allows the maximum inductor peak current to remain
unaffected throughout all duty cycles.
APPLICATIONS INFORMATION
LTC3867
21
3867f
APPLICATIONS INFORMATION
Inductor Value Calculation
Given the desired input and output voltages, the inductor
value and operating frequency, f
OSC
, directly determine
the inductor’s peak-to-peak ripple current:
I
RIPPLE
=
V
OUT
V
IN
V
IN
– V
OUT
f
OSC
• L
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors, and output voltage
ripple. Thus, highest efficiency operation is obtained at
low frequency with a small ripple current. Achieving this,
however, requires a large inductor.
A reasonable starting point is to choose a ripple current
that is about 40% of I
OUT(MAX)
. Note that the largest ripple
current occurs at the highest input voltage. To guarantee
that ripple current does not exceed a specified maximum,
the inductor should be chosen according to:
L ≥
V
IN
– V
OUT
f
OSC
•I
RIPPLE
•
V
OUT
V
IN
Inductor Core Selection
Once the inductance value is determined, the type of in-
ductor must be selected. Core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore copper losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode
(Optional) Selection
At least two external power MOSFETs need to be selected:
One N-channel MOSFET for the top (main) switch and one
or more N-channel MOSFET(s) for the bottom (synchro-
nous) switch. The number, type and on-resistance of all
MOSFETs selected take into account the voltage step-down
ratio as well as the actual position (main or synchronous)
in which the MOSFET will be used. A much smaller and
much lower input capacitance MOSFET should be used
for the top MOSFET in applications that have an output
voltage that is less than 1/3 of the input voltage. In applica-
tions where V
IN
>> V
OUT
, the top MOSFETs’ on-resistance
is normally less important for overall efficiency than its
input capacitance at operating frequencies above 300kHz.
MOSFET manufacturers have designed special purpose
devices that provide reasonably low on-resistance with
significantly reduced input capacitance for the main switch
application in switching regulators.
The peak-to-peak MOSFET gate drive levels are set by the
voltage, V
INTVCC
, requiring the use of logic-level threshold
MOSFETs in most applications. Pay close attention to the
BV
DSS
specification for the MOSFETs as well; many of the
logic-level MOSFETs are limited to 30V or less. Selection
criteria for the power MOSFETs include the on-resistance,
R
DS(ON)
, input capacitance, input voltage and maximum
output current. MOSFET input capacitance is a combina-
tion of several components but can be taken from the
typical gate charge
curve included on most data sheets
(Figure 9). The curve is generated by forcing a constant
input current into the gate of a common source, current
source loaded stage and then plotting the gate voltage
versus time.
The initial slope is the effect of the gate-to-source and
the gate-to-drain capacitance. The flat portion of the
curve is the result of the Miller multiplication effect of the
drain-to-gate capacitance as the drain drops the voltage
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LTC3867IUF#PBF

Mfr. #:
Buy LTC3867IUF#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Synchronous Step-Down DC/DC Controller with Differential Remote Sense and Non-Linear Control
Lifecycle:
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