ZL40205 Data Sheet
15
Microsemi Corporation
3.4 Power Supply
This device operates employing either a 2.5V supply or 3.3V supply.
3.4.1 Sensitivity to power supply noise
Power supply noise from sources such as switching power supplies and high-power digital components such as
FPGAs can induce additive jitter on clock buffer outputs. The ZL40205 is equipped with a low drop out (LDO)
regulator and on-chip bulk capacitors to minimize additive jitter due to power supply noise. The on-chip regulation,
recommended power supply filtering, and good PCB layout all work together to minimize the additive jitter from
power supply noise.
3.4.2 Power supply filtering
Jitter levels may increase when noise is present on the power pins. For optimal jitter performance, the device
should be isolated from the power planes connected to its power supply pins as shown in
Figure 19.
10 µF capacitors should be size 0603 or size 0805 X5R or X7R ceramic, 6.3 V minimum rating
0.1 µF capacitors should be size 0402 X5R ceramic, 6.3 V minimum rating
Capacitors should be placed next to the connected device power pins
a 0.3 ohm resistor is recommended
Figure 19 - Decoupling Connections for Power Pins
3.4.3 PCB layout considerations
The power nets in Figure 19 can be implemented either as a plane island or routed power topology without
changing the overall jitter performance of the device.
ZL40205
1
8
9
19
22
32
0.1 µF
0.1 µF
vdd_core
10 µF
0.1 µF
0.15
vdd
0.1 µF
10 µF
Absolute Maximum Ratings*
Parameter Sym. Min. Max. Units
1 Supply voltage V
DD_R
-0.5 4.6 V
2 Voltage on any digital pin V
PIN
-0.5 VDD V
4 LVPECL output current I
out
30 mA
5 Soldering temperature T 260 °C
6 Storage temperature T
ST
-55 125 °C
7 Junction temperature T
j
125 °C
8 Voltage on input pin V
input
VDD V
9 Input capacitance each pin C
p
500 fF
ZL40205 Data Sheet
16
Microsemi Corporation
4.0 AC and DC Electrical Characteristics
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
* Voltages are with respect to ground (GND) unless otherwise stated
Recommended Operating Conditions*
Characteristics Sym. Min. Typ. Max. Units
1 Supply voltage 2.5 V mode V
DD25
2.375 2.5 2.625 V
2 Supply voltage 3.3 V mode V
DD33
3.135 3.3 3.465 V
3 Operating temperature T
A
-40 25 85 °C
* Voltages are with respect to ground (GND) unless otherwise stated
DC Electrical Characteristics - Current Consumption
Characteristics Sym. Min. Typ. Max. Units Notes
1 Supply current LVPECL drivers -
un
loaded
I
dd_unload
110 mA Unloaded
2
Supply current LVPECL drivers -
loa
ded (all outputs are active)
I
dd_load
209 mA Including power
to R
L
= 50Ω
DC Electrical Characteristics - Inputs and Outputs - for 3.3 V Supply
Characteristics Sym. Min. Typ. Max. Units Notes
1 CMOS control logic high-level
input
voltage
V
CIH
0.7*V
DD
V
2 CMOS control logic low
-level input
voltage
V
CIL
0.3*V
DD
V
3 CMOS control logic Input leakage
current
I
IL
1 µA V
I
= V
DD
or 0 V
4 Differential input common mode
volt
age
V
CM
1.1 2.0 V
5 Differential input voltage difference V
ID
0.25 1 V
6 Differential input resistance V
IR
80 100 120 ohm
ZL40205 Data Sheet
17
Microsemi Corporation
* This parameter was measured from 125 MHz to 750 MHz.
* This parameter was measured from 125 MHz to 750 MHz.
Figure 20 - Differential and Single-Ended Output Voltages Parameter Definitions
* Supply voltage and operating temperature are as per Recommended Operating Conditions
7 LVPECL output high voltage V
OH
V
DD
-
1.40
V
8 LVPECL output low voltage V
OL
V
DD
-
1.62
V
9 LVPECL output differential voltage* V
OD
0.5 0.9 V
DC Electrical Characteristics - Inputs and Outputs - for 2.5 V Supply
Characteristics Sym. Min. Typ. Max. Units Notes
1 Differential input common mode
volt
age
V
CM
1.1 1.6 V
2 Differential input voltage difference V
ID
0.25 1 V
3 Differential input resistance V
IR
80 100 120 ohm
4 LVPECL output high voltage V
OH
V
DD
-
1.40
V
5 LVPECL output low voltage V
OL
V
DD
-
1.62
V
6 LVPECL output differential voltage* V
OD
0.4 0.9 V
2*V
OD
V
OD
AC Electrical Characteristics* - Inputs and Outputs (see Figure 21) - for 2.5/3.3 V supply.
Characteristics Sym. Min. Typ. Max. Units Notes
1 Maximum Operating Frequency 1/t
p
750 MHz
2 Input to output clock propagation delay t
pd
0 1 2 ns
3 Output to output skew t
out2out
50 100 ps
4 Part to part output skew t
part2part
80 300 ps
5 Output clock Duty Cycle degradation t
PWH
/ t
PWL
-2 0 2 Percent
6 LVPECL Output clock slew rate r
SL
0.75 1.2 V/ns
DC Electrical Characteristics - Inputs and Outputs - for 3.3 V Supply
Cha
racteristics Sym. Min. Typ. Max. Units Notes

ZL40205LDG1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Clock Buffer 1:6 LVPECL Fanout Buffer w/Int. Term.
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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