ZL40205 Data Sheet
6
Microsemi Corporation
2.0 Pin Description
Pin # Name Description
3, 6 clk_p, clk_n, Differential Input (Analog Input). Differential (or single ended) input signals.
For all input configurations see “Clock Inputs” on page 6
28, 27,
26, 25,
24, 23,
18, 17,
16, 15,
14, 13
out0_p, out0_n
out1_p, out1_n
out2_p, out2_n
out3_p, out3_n
out4_p, out4_n
out5_p, out5_n
Differential Output (Analog Output). Differential outputs.
9, 19,
22, 32
vdd Positive Supply Voltage. 2.5 V
DC
or 3.3 V
DC
nominal.
1, 8 vdd_core Positive Supply Voltage. 2.5 V
DC
or 3.3 V
DC
nominal.
2, 7,
20, 21
gnd Ground. 0 V.
4vtOn-Chip Input Termination Node (Analog). Center tap between internal 50 Ohm
termination resistors.
The use of this pin is detailed in section 3.1, “Clock Inputs“, for various input signal types.
5ctrlDigital Control for On-Chip Input Termination (Input). Selects differential input mode;
0: DC coupled LVPECL or LVDS modes
1: AC coupled differential modes
This pin are internally pulled down to GND. The use of this pin is detailed in section 3.1,
“Clock Inputs“, for various input signal types.
10, 11,
12, 29,
30, 31
NC No Connection. Leave unconnected.
