CS5371A CS5372A
22 DS748F3
age reference input impedance will vary with
MCLK.
The voltage reference external RC filter series
resistor creates a voltage divider with the
VREF input impedance to reduce the effective
applied input voltage. To minimize gain error
resulting from this voltage divider effect, the
RC filter series resistor should be the minimum
size recommended in the voltage reference
device data sheet.
7.5 VREF Accuracy
The nominal voltage reference input is speci-
fied as 2.500 V across the VREF
± pins, and all
CS5371A and CS5372A gain accuracy speci-
fications are measured using a nominal volt-
age reference input. Any variation from a
nominal VREF input will proportionally vary the
analog full-scale gain accuracy.
Since temperature drift of the voltage refer-
ence results in gain drift of the analog full-scale
amplitude, care should be taken to minimize
temperature drift effects through careful selec-
tion of passive components and the voltage
reference device itself. Gain drift specifications
of the CS5371A and CS5372A do not include
the temperature drift effects of external pas-
sive components or of the voltage reference
device itself.
CS5371A CS5372A
DS748F3 23
8. POWER SUPPLIES
The CS5371A and CS5372A modulators have
a positive analog power supply pin (VA+), a
negative analog power supply pin (VA-), a dig-
ital power supply pin (VD), and a ground pin
(GND).
For proper operation, power must be supplied
to all power supply pins, and the ground pin
must be connected to system ground. The
CS5371A and CS5372A digital power supply
(VD) and the CS5376A digital power supply
(VDD) must share a common voltage.
8.1 Power Supply Bypassing
The VA+, VA-, and VD power supplies should
be bypassed to system ground with 0.1 μF ca-
pacitors placed as close as possible to the
power pins of the device. In addition to the
0.1 μF local bypass capacitors, at least 100 μF
bulk capacitance to system ground should be
placed on each power supply near the voltage
regulator output, with additional power supply
bulk capacitance placed among the analog
component route if space permits. Bypass ca-
pacitors should be X7R, C0G, tantalum, or
other high-quality dielectric type.
8.2 PCB Layers and Routing
The CS5371A and CS5372A are high-perfor-
mance devices, and special care must be tak-
en to ensure power and ground routing is
correct. Power can be supplied either through
dedicated power planes or routed traces.
When routing power traces, it is recommended
to use a “star” routing scheme with the star
point either at the voltage regulator output or at
a local power supply bulk capacitor.
It is also recommended to dedicate a full PCB
layer to a solid ground plane, without splits or
routing. All bypass capacitors should connect
between the power supply circuit and the solid
ground plane as near as possible to the device
power supply pins.
The CS5371A and CS5372A analog signals
are differentially routed and do not normally re-
quire connection to a separate analog ground.
However, if a separate analog ground is re-
quired, it should be routed using a “star” rout-
ing scheme on a separate layer from the solid
ground plane and connected to the ground
plane only at a single point. Be sure all active
devices and passive components connected
to the separate analog ground are included in
the “star” route to ensure sensitive analog cur-
rents do not return through the ground plane.
8.3 Power Supply Rejection
Power supply rejection of the CS5371A and
CS5372A is frequency dependent. The
CS5376A digital filter fully rejects power sup-
ply noise for frequencies above the selected
digital filter corner frequency. Power supply
noise frequencies between DC and the digital
filter corner frequency are rejected as speci-
fied in the Power Supply Characteristics table.
CS5371A
CS5372A
VA+ VD
VA- GND
0.1 uF 100 uF0.1 uF100 uF
100 uF
0.1 uF
To VA+
Regulator
To VA-
Regulator
To VD
Regulator
Figure 15. Power Supply Diagram
CS5371A CS5372A
24 DS748F3
8.4 SCR Latch-up Considerations
It is recommended to connect the VA- power
supply to system ground (GND) with a re-
verse-biased Schottky diode. At power up, if
the VA+ power supply ramps up before the
VA- supply is established, the VA- pin voltage
could be pulled above ground potential
through the CS5371A and CS5372A device. If
the VA- supply is pulled 0.7 V or more above
GND, SCR latch-up can occur. A reverse-bi-
ased Schottky diode will clamp the VA- voltage
a maximum of 0.3 V above ground to ensure
SCR latch-up does not occur at power up.
8.5 DC-DC Converters
Many low-frequency measurement systems
are battery powered and utilize DC-DC con-
verters to efficiently generate power supply
voltages. To minimize interference effects, op-
erate the DC-DC converter at a frequency
which is rejected by the digital filter, or operate
it synchronous to the MCLK rate.
A synchronous DC-DC converter whose oper-
ating frequency is derived from MCLK will the-
oretically minimize the potential for “beat
frequencies” to appear in the measurement
bandwidth. However this requires the source
clock to remain jitter free within the DC-DC
converter circuitry. If clock jitter can occur with-
in the DC-DC converter (as in a PLL-based ar-
chitecture), it’s better to use a non-
synchronous DC-DC converter whose switch-
ing frequency is rejected by the digital filter.
During PCB layout, do not place high-current
DC-DC converters near sensitive analog com-
ponents. Carefully routing a separate DC-DC
“star” ground will help isolate noisy switching
currents away from the sensitive analog com-
ponents.

CS5372A-ISZR

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Analog to Digital Converters - ADC LP High Performance Delta Sigma Mod.
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