DS3882
Dual-Channel Automotive CCFL Controller
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Table 6. Control Register 1 (CR1) [Shadowed-EEPROM, F4h]
BIT R/W
FACTORY
DEFAULT
NAME FUNCTION
0 R/W 0 LOCE
Lamp Overcurrent Enable
0 = Lamp overcurrent detection disabled.
1 = Lamp overcurrent detection enabled.
1 R/W 0 POSCS
POSC Select. See POSCR0 and POSCR1 control bits in Control Register 2 to select
the oscillator range.
0 = POSC input is connected with a resistor to ground to set the frequency of the
internal PWM oscillator.
1 = POSC input is a 22.5Hz to 440Hz clock.
2 R/W 0 LFSS
Lamp Frequency Source Select
0 = Lamp frequency generated internally and sourced from the LSYNC output.
1 = Lamp frequency generated externally and supplied to the LSYNC input.
3 R/W 0 DPSS
DPWM Signal Source Select
0 = DPWM signal generated internally and sourced from the PSYNC output.
1 = DPWM signal generated externally and supplied to the PSYNC input.
4 R/W 0 RGSO
Ramp Generator Source Option
0 = Source DPWM at the PSYNC output.
1 = Source internal ramp generator at the PSYNC output.
5 R/W 0 ARD
Autoretry Disable
0 = Autoretry function enabled.
1 = Autoretry function disabled.
6 R/W 0 FRS
Fault Response Select
0 = Disable only the malfunctioning channel.
1 = Disable both channels upon fault detection on any channel.
7 R/W 0 DPD
DPWM Disable
0 = DPWM function enabled.
1 = DPWM function disabled.
