AD9398
Rev. 0 | Page 33 of 44
Table 33.
CA Channel Number
Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
0 0 0 0 0 FR FL
0 0 0 0 1 LFE FR FL
0 0 0 1 0 FC FR FL
0 0 0 1 1 FC LFE FR FL
0 0 1 0 0 RC FR FL
0 0 1 0 1 RC LFE FR FL
0 0 1 1 0 RC FC FR FL
0 0 1 1 1 RC FC LFE FR FL
0 1 0 0 0 RR RL FR FL
0 1 0 0 1 RR RL LFE FR FL
0 1 0 1 0 RR RL FC FR FL
0 1 0 1 1 – RR RL FC LFE FR FL
0 1 1 0 0 – RC RR RL FR FL
0 1 1 0 1 – RC RR RL LFE FR FL
0 1 1 1 0 – RC RR RL FC FR FL
0 1 1 1 1 – RC RR RL FC LFE FR FL
1 0 0 0 0 RRC RLC RR RL FR FL
1 0 0 0 1 RRC RLC RR RL LFE FR FL
1 0 0 1 0 RRC RLC RR RL FC FR FL
1 0 0 1 1 RRC RLC RR RL FC LFE FR FL
1 0 1 0 0 FRC FLC v FR FL
1 0 1 0 1 FRC FLC v LFE FR FL
1 0 1 1 0 FRC FLC FC FR FL
1 0 1 1 1 FRC FLC FC LFE FR FL
1 1 0 0 0 FRC FLC RC FR FL
1 1 0 0 1 FRC FLC RC LFE FR FL
1 1 0 1 0 FRC FLC RC FC FR FL
1 1 0 1 1 FRC FLC RC FC LFE FR FL
1 1 1 0 0 FRC FLC RR RL v FR FL
1 1 1 0 1 FRC FLC RR RL LFE FR FL
1 1 1 1 0 FRC FLC RR RL FC FR FL
1 1 1 1 1 FRC FLC RR RL FC LFE FR FL
0x95—Bit[7] Down-Mix Inhibit
0x95—Bits[6:3] Level Shift Values
These bits define the amount of attenuation. The value directly
corresponds to the amount of attenuation: for example, 0000 =
0 dB, 0001 = 1 dB to 1111 = 15 dB attenuation.
0x96—Bits[7:0] Reserved
0x97—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0x98—Bits[7:0] Source Product Description (SPD)
Infoframe Version
0x99—Bits[7:0] Vender Name Character 1 (VN1)
This is the first character in eight that is the name of the
company that appears on the product. The data characters are
7-bit ASCII code.
0x9A—Bits[7:0] VN2
0x9B—Bits[7:0] VN3
0x9C—Bits[7:0] VN4
0x9D—Bits[7:0] VN5
0x9E—Bits[7:0] VN6
0x9F—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xA0—Bits[7:0] VN7
0xA1—Bits[7:0] VN8
0xA2—Bits[7:0] Product Description Character 1 (PD1)
This is the first character of 16 that contain the model number
and a short description of the product. The data characters are
7-bit ASCII code.
AD9398
Rev. 0 | Page 34 of 44
0xA3—Bits[7:0] PD2
0xA4—Bits[7:0] PD3
0xA5—Bits[7:0] PD4
0xA6—Bits[7:0] PD5
0xA7—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xA8—Bits[7:0] PD6
0xA9—Bits[7:0] PD7
0xAA—Bits[7:0] PD8
0xAB—Bits[7:0] PD9
0xAC—Bits[7:0] PD10
0xAD—Bits[7:0] PD11
0xAE—Bits[7:0] PD12
0xAF—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xB0—Bits[7:0] PD13
0xB1—Bits[7:0] PD14
0xB2—Bits[7:0] PD15
0xB3—Bits[7:0] PD16
0xB4—Bits[7:0] Source Device Information Code
These bytes classify the source device.
Table 34.
SDI Code Source
0x00 Unknown
0x01 Digital STB
0x02 DVD
0x03 D-VHS
0x04 HDD video
0x05 DVC
0x06 DSC
0x07 Video CD
0x08 Game
0x09 PC general
0xB7—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xB8—Bits[7:0] MPEG Source Infoframe Version
0xB9—Bits[7:0] MPEG Bit Rate Byte 0 (MB0)
This is the lower 8 bits of 32 bits that specify the MPEG bit rate
in Hz.
0xBA—Bits[7:0] MB1
0xBB—Bits[7:0] MB2
0xBC—Bits[7:0] MB3—Upper Byte
0xBD—Bit[4] Field Repeat
This defines whether the field is new or repeated. 0 = new field
or picture. 1 = repeated field.
0xBD—Bits[1:0] MPEG Frame
This identifies the frame as I, B, or P.
Table 35.
MF[1:0] Frame Type
00 Unknown
01 I—picture
10 B—picture
11 P—picture
0xBE—Bits[7:0] Reserved
0xBF—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xC0—Bits[7:0] Audio Content Protection Packet (ACP
Type)
These bits define which audio content protection is used.
Table 36.
Code ACP Type
0x00 Generic audio
0x01 IEC 60958-identified audio
0x02 DVD-audio
0x03 Reserved for super audio CD (SACD)
0x04—0xFF Reserved
0xC1—ACP Packet Byte 0 (ACP_PB0)
0xC2—Bits[7:0] ACP_PB1
0xC3—Bits[7:0] ACP_PB2
0xC4—Bits[7:0] ACP_PB3
0xC5—Bits[7:0] ACP_PB4
0xC7—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xC8—Bit[7] International Standard Recording Code
(ISRC1) Continued
This bit indicates that a continuation of the 16 ISRC1 packet
bytes (an ISRC2 packet) is being transmitted.
0xC8—Bit[6] ISRC1 Valid
This bit is an indication of the whether ISRC1 packet bytes are
valid. 0 = ISRC1 status bits and PBs not valid. 1 = ISRC1 status
bits and PBs valid.
0xC8] 2:0] ISRC Status
These bits define where in the ISRC track the samples are: at
least two transmissions of 001 occur at the beginning of the
track, while continuous transmission of 010 occurs in the
middle of the track, followed by at least two transmissions of
100 near the end of the track.
AD9398
Rev. 0 | Page 35 of 44
0xC9—Bits[7:0] ISRC1 Packet Byte 0 (ISRC1_PB0)
0xCA—Bits[7:0] ISRC1_PB1
0xCB—Bits[7:0] ISRC1_PB2
0xCC—Bits[7:0] ISRC1_PB3
0xCD—Bits[7:0] ISRC1_PB4
0xCE—Bits[7:0] ISRC1_PB5
0xCF—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xD0—Bits[7:0] ISRC1_PB6
0xD1—Bits[7:0] ISRC1_PB7
0xD2—Bits[7:0] ISRC1_PB8
0xD3—Bits[7:0] ISRC1_PB9
0xD4—Bits[7:0] ISRC1_PB10
0xD5—Bits[7:0] ISRC1_PB11
0xD6—Bits[7:0] ISRC1_PB12
0xD7—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xD8—Bits[7:0] ISRC1_PB13
0xD9—Bits[7:0] ISRC1_PB14
0xDA—Bits[7:0] ISRC1_PB15
0xDB—Bits[7:0] ISRC1_PB16
0xDC—Bits[7:0] ISRC2 Packet Byte 0 (ISRC2_PB0)
This is transmitted only when the ISRC continue bit
(Register 0xC8 Bit 7) is set to 1.
0xDD—Bits[7:0] ISRC2_PB1
0xDE—Bits[7:0] ISRC2_PB2
0xDF—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xE0—Bits[7:0] ISRC2_PB3
0xE1—Bits[7:0] ISRC2_PB4
0xE2—Bits[7:0] ISRC2_PB5
0xE3—Bits[7:0] ISRC2_PB6
0xE4—Bits[7:0] ISRC2_PB7
0xE5—Bits[7:0] ISRC2_PB8
0xE6—Bits[7:0] ISRC2_PB9
0xE7—Bits[6:0] New Data Flags
See Register 0x87 for a description.
0xE8—Bits[7:0] ISRC2_PB10
0xE9—Bits[7:0] ISRC2_PB11
0xEA—Bits[7:0] ISRC2_PB12
0xEB—Bits[7:0] ISRC2_PB13
0xEC—Bits[7:0] ISRC2_PB14
0xED—Bits[7:0] ISRC2_PB15
0xEE—Bits[7:0] ISRC2_PB16

AD9398/PCBZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
BOARD EVALUATION FOR AD9398
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New from this manufacturer.
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