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DS2180AQN

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P35
DS2180A
31 of 35
SERIAL PORT READ AC TIMING
NOTE:
1. Serial port write must precede a port read to provide address information.
AC ELECTRICAL CHARACTERISTICS
1
– TRANSMIT
(0°C to 70°C; V
DD
= 5.0V ± 10%)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
TCLK Period t
P
250 648 ns
TCLK Pulse Width t
WL,
t
WH
125 324 ns
TCLK, RCLK Raise & Fall
Times
t
W,
t
R
20 ns
TSER, TABCD, TLINK
Setup to TCLK Falling
t
STD
50 ns
TSER, TABCD, TLINK Hold
from TCLK Falling
t
HTD
50 ns
TFSYNC, TMSYNC Setup to
TCLK Rising
t
STS
-125 125 ns
Propagation Delay TFSYNC
to TMO, TSIGSEL, TSIGFR,
TLCLK
t
PTS
75 ns
Propagation Delay TCLK to
TCHCLK
t
PTCH
75 ns
TFSYNC, TMSYNC Pulse
Width
t
TSP
100 ns
NOTES:
1. Measured at V
IH
= 2.0V; V
IL
= .8V and 10 ns maximum rise and fall time.
2. Output load capacitance = 100 pF.
DS2180A
32 of 35
AC ELECTRICAL CHARACTERISTICS
1
– RECEIVE
(0°C to 70°C; V
DD
= 5.0V ± 10%)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Propagation Delay RCLK to
RMSYNC, RFSYNC,
RSIGSEL, RSIGFR, RLCLK,
RCHCLK
t
PRS
75 ns
Propagation Delay RCLK to
RSER, RABCD, RLINK
t
PRD
75 ns
Transition Time All Outputs t
TTR
20 ns
RCLK Period t
P
250 648 ns
RCLK Pulse Width t
WL,
t
WH
125 324 ns
RCLK Rise and Fall Times t
R,
t
F
20 ns
RPOS, RNEG Setup to RCLK
Falling
t
SRD
50 ns
RPOS, RNEG Hold to RCLK
Falling
t
HRD
50 ns
Propagation Delay RCLK to
RYEL, RCL, RFER, RLOS,
RBV
t
PRA
75 ns
Minimum RST Pulse Width
on System Power Up or
Restart
t
RST
1µs
NOTES:
1. Measured at V
IH
= 2.0V; V
IL
= .8V and 10 ns maximum rise and fall times.
2. Output load capacitance = 100 pF.
DS2180A
33 of 35
TRANSMIT AC TIMING DIAGRAM
RECEIVE AC TIMING DIAGRAM
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P35

DS2180AQN

Mfr. #:
Buy DS2180AQN
Manufacturer:
Maxim Integrated
Description:
Telecom Interface ICs T1 Transceiver
Lifecycle:
New from this manufacturer.
Delivery:
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