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ADCMP582BCPZ-WP

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
ADCMP580/ADCMP581/ADCMP582 Data Sheet
Rev. B | Page 4 of 16
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
ADCMP582 (PECL) V
CCO
= 3.3 V
Output Voltage High Level V
OH
50 Ω to V
CCO
− 2 V, T
A
= 125°C V
CCO
− 0.99 V
CCO
− 0.87 V
CCO
− 0.75 V
Output Voltage High Level V
OH
50 Ω to V
CCO
− 2 V, T
A
= 25°C V
CCO
− 1.06 V
CCO
− 0.94 V
CCO
− 0.82 V
Output Voltage High Level V
OH
50 Ω to V
CCO
− 2 V, T
A
= −55°C V
CCO
− 1.11 V
CCO
− 0.99 V
CCO
− 0.87 V
Output Voltage Low Level
V
OL
50 Ω to V
CCO
− 2 V, T
A
= 125°C
V
CCO
− 1.43
V
CCO
− 1.26
V
CCO
− 1.13
V
Output Voltage Low Level V
OL
50 Ω to V
CCO
− 2 V, T
A
= 25°C V
CCO
− 1.50 V
CCO
− 1.33 V
CCO
− 1.20 V
Output Voltage Low Level V
OL
50 Ω to V
CCO
− 2 V, T
A
= −55°C V
CCO
− 1.55 V
CCO
− 1.35 V
CCO
− 1.25 V
Output Voltage Differential 50 Ω to V
CCO
− 2.0 V 340 395 450 mV
AC PERFORMANCE
Propagation Delay t
PD
V
OD
= 500 mV 180 ps
Propagation Delay Temperature Coefficient Δt
PD
/d
T
0.25 ps/°C
Propagation Delay Skew—Rising
Transition to Falling Transition
V
OD
= 500 mV, 5 V/ns 10 ps
Overdrive Dispersion 50 mV < V
OD
< 1.0 V 10 ps
10 mV < V
OD
< 200 mV 15 ps
Slew Rate Dispersion 2 V/ns to 10 V/ns 15 ps
Pulse Width Dispersion 100 ps to 5 ns 15 ps
Duty Cycle Dispersion 5% to 95% 1.0 V/ns, 15 MHz, V
CM
= 0.0 V 10 ps
Common-Mode Dispersion V
OD
= 0.2 V, −2 V < V
CM
< 3 V 5 ps/V
Equivalent Input Bandwidth
1
BW
EQ
0.0 V to 400 mV input,
t
R
= t
F
= 25 ps, 20/80
8 GHz
Toggle Rate >50% output swing 12.5 Gbps
Deterministic Jitter DJ V
OD
= 500 mV, 5 V/ns,
PRBS
31
− 1 NRZ, 5 Gbps
15 ps
Deterministic Jitter DJ V
OD
= 200 mV, 5 V/ns,
PRBS
31
− 1 NRZ, 10 Gbps
25 ps
RMS Random Jitter RJ V
OD
= 200 mV, 5 V/ns, 1.25 GHz 0.2 ps
Minimum Pulse Width PW
MIN
Δt
PD
< 5 ps 100 ps
Minimum Pulse Width PW
MIN
Δt
PD
< 10 ps 80 ps
Rise/Fall Time
t
R,
t
F
20/80
37
ps
POWER SUPPLY
Positive Supply Voltage V
CCI
+4.5 +5.0 +5.5 V
Negative Supply Voltage V
EE
−5.5 −5.0 −4.5 V
ADCMP580 (CML)
Positive Supply Current I
VCCI
V
CCI
= 5.0 V, 50 Ω to GND 6 8 mA
Negative Supply Current I
VEE
V
EE
= −5.0 V, 50 Ω to GND −50 −40 −34 mA
Power Dissipation P
D
50 Ω to GND 230 260 mW
ADCMP581 (NECL)
Positive Supply Current
I
VCCI
V
CCI
= 5.0 V, 50 Ω to −2 V
6
8
mA
Negative Supply Current I
VEE
V
EE
= −5.0 V, 50 Ω to −2 V −35 −25 −19 mA
Power Dissipation P
D
50 Ω to −2 V 155 200 mW
ADCMP582 (PECL)
Logic Supply Voltage V
CCO
+2.5 +3.3 +5.0 V
Input Supply Current
I
VCCI
V
CCI
= 5.0 V, 50 Ω to V
CCO
− 2 V
6
8
mA
Output Supply Current I
VCCO
V
CCO
= 5.0 V, 50 Ω to V
CCO
− 2 V 44 55 mA
Negative Supply Current I
VEE
V
EE
= −5.0 V, 50 Ω to V
CCO
− 2 V −35 −25 −19 mA
Power Dissipation P
D
50 Ω to V
CCO
− 2 V 310 350 mW
Power Supply Rejection (V
CCI
) PSR
VCCI
V
CCI
= 5.0 V + 5% −75 dB
Power Supply Rejection (V
EE
) PSR
VEE
V
EE
= −5.0 V + 5% −60 dB
Power Supply Rejection (V
CCO
) PSR
VCCO
V
CCO
= 3.3 V + 5% (ADCMP582) −75 dB
1
Equivalent input bandwidth assumes a simple first-order input response and is calculated with the following formula: BW
EQ
= 0.22/(tr
COMP
2
– tr
IN
2
), where tr
IN
is the 20/80
transition time of a quasi-Gaussian input edge applied to the comparator input and tr
COMP
is the effective transition time digitized by the comparator.
Data Sheet ADCMP580/ADCMP581/ADCMP582
Rev. B | Page 5 of 16
TIMING INFORMATION
Figure 2 shows the ADCMP580/ADCMP581/ADCMP582 compare and latch timing relationships. Table 2 provides the definitions of the
terms shown in Figure 2.
Figure 2. Comparator Timing Diagram
Table 2. Timing Descriptions
Symbol Symbol Description Timing Description
t
PDH
Input-to-Output High Delay
Propagation delay measured from the time the input signal crosses the reference
(± the input offset voltage) to the 50% point of an output low-to-high transition.
t
PDL
Input-to-Output Low Delay Propagation delay measured from the time the input signal crosses the reference
(± the input offset voltage) to the 50% point of an output high-to-low transition.
t
PLOH
Latch Enable-to-Output High Delay Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output low-to-high transition.
t
PLOL
Latch Enable-to-Output Low Delay Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output high-to-low transition.
t
H
Minimum Hold Time Minimum time after the negative transition of the latch enable signal that the input
signal must remain unchanged to be acquired and held at the outputs.
t
PL
Minimum Latch Enable Pulse Width Minimum time that the latch enable signal must be high to acquire an input signal change.
t
S
Minimum Setup Time Minimum time before the negative transition of the latch enable signal that an input
signal change must be present to be acquired and held at the outputs.
t
R
Output Rise Time Amount of time required to transition from a low to a high output as measured at the
20% and 80% points.
t
F
Output Fall Time Amount of time required to transition from a high to a low output as measured at the
20% and 80% points.
V
N
Normal Input Voltage
Difference between the input voltages V
P
and V
N
for output true.
V
OD
Voltage Overdrive Difference between the input voltages V
P
and V
N
for output false.
ADCMP580/ADCMP581/ADCMP582 Data Sheet
Rev. B | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
SUPPLY VOLTAGES
Positive Supply Voltage (V
CCI
to GND) −0.5 V to +6.0 V
Negative Supply Voltage (V
EE
to GND) –6.0 V to +0.5 V
Logic Supply Voltage (V
CCO
to GND) −0.5 V to +6.0 V
INPUT VOLTAGES
Input Voltage −3.0 V to +4.0 V
Differential Input Voltage −2 V to +2 V
Input Voltage, Latch Enable −2.5 V to +5.5 V
HYSTERESIS CONTROL PIN
Applied Voltage (HYS to V
EE
) −5.5 V to +0.5 V
Maximum Input/Output Current 1 mA
OUTPUT CURRENT
ADCMP580 (CML) −25 mA
ADCMP581 (NECL) −40 mA
ADCMP582 (PECL) −40 mA
TEMPERATURE
Operating Temperature Range, Ambient −40°C to +125°C
Operating Temperature, Junction
125°C
Storage Temperature Range −65°C to +150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL CONSIDERATIONS
The ADCMP580/ADCMP581/ADCMP582 16-lead LFCSP
option has a junction-to-ambient thermal resistance (θ
JA
) of
70°C/W in still air.
ESD CAUTION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

ADCMP582BCPZ-WP

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Manufacturer:
Analog Devices Inc.
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Analog Comparators Ultrafast SiGe VTG
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