General Description
The MAX5894 programmable interpolating, modulating,
500Msps, dual digital-to-analog converter (DAC) offers
superior dynamic performance and is optimized for high-
performance wideband, single-carrier transmit applica-
tions. The device integrates a selectable 2x/4x/8x
interpolating filter, a digital quadrature modulator, and
dual 14-bit, high-speed DACs on a single integrated cir-
cuit. At 30MHz output frequency and 500Msps update
rate, the in-band SFDR is 86dBc while consuming 1.1W.
The device also delivers 73dB ACLR for two-carrier
WCDMA at a 61.44MHz output frequency.
The selectable interpolating filters allow lower input data
rates while taking advantage of the high DAC update
rates. These linear-phase interpolation filters ease
reconstruction filter requirements and enhance the
passband dynamic performance. Individual offset and
gain programmability allow the user to calibrate out local
oscillator (LO) feedthrough and sideband suppression
errors generated by analog quadrature modulators.
The MAX5894 features a f
IM
/4 digital image-reject mod-
ulator. This modulator generates a quadrature-modulat-
ed IF signal that can be presented to an analog I/Q
modulator to complete the upconversion process. A
second digital modulation mode allows the signal to be
frequency-translated with image pairs at f
IM
/2 or f
IM
/4.
The MAX5894 features a standard 1.8V CMOS, 3.3V tol-
erant data input bus for easy interface. A 3.3V SPI™ port
is provided for mode configuration. The programmable
modes include the selection of 2x/4x/8x interpolating fil-
ters, f
IM
/2, f
IM
/4 or no digital quadrature modulation with
image rejection, channel gain and offset adjustment, and
offset binary or two’s complement data interface.
Pin-compatible 12- and 16-bit devices are also available.
Refer to the MAX5893 data sheet for the 12-bit version
and the MAX5895 data sheet for the 16-bit version.
Applications
Base Stations: 3G UMTS, CDMA, and GSM
Broadband Wireless Transmitters
Broadband Cable Infrastructure
Instrumentation and Automatic Test Equipment (ATE)
Analog Quadrature Modulation Architectures
Features
o 74dB ACLR at f
OUT
= 61.44MHz (Single-Carrier
WCDMA)
o Meets 3G UMTS, cdma2000
®
, GSM Spectral Masks
(f
OUT
= 122MHz)
o Noise Spectral Density = -154dBFS/Hz at
f
OUT
= 16MHz
o 91dBc SFDR at Low-IF Frequency (10MHz)
o 88dBc SFDR at High-IF Frequency (50MHz)
o Low Power: 886mW (f
CLK
= 250MHz)
o User Programmable
Selectable 2x, 4x, or 8x Interpolating Filters
< 0.01dB Passband Ripple
> 99dB Stopband Rejection
Selectable Real or Complex Modulator Operation
Selectable Modulator LO Frequency: OFF, f
IM
/2
or f
IM
/4
Selectable Output Filter: Lowpass or Highpass
Channel Gain and Offset Adjustment
o EV Kit Available (Order the MAX5894 EV Kit)
MAX5894
14-Bit, 500Msps, Interpolating and Modulating
Dual DAC with CMOS Inputs
________________________________________________________________
Maxim Integrated Products
1
PART
RESOLUTION
(BITS)
DAC UPDATE
RATE (Msps)
INPUT
LOGIC
MAX5893 12 500 CMOS
MAX5894 14 500 CMOS
MAX5895 16 500 CMOS
MAX5898 16 500 LVDS
PART TEMP RANGE PIN-PACKAGE
MAX5894EGK-D -40°C to +85°C 68 QFN-EP*
MAX5894EGK+D -40°C to +85°C 68 QFN-EP*
Selector Guide
Ordering Information
DATA SYNCH
AND DEMUX
DAC
DATA
PORT A
DATA
PORT B
DATACLK
OUTI
OUTQ
MODULATOR
2x
INTERPOLATING
FILTERS
1x/2x/4x
INTERPOLATING
FILTERS
DAC
Simplified Diagram
19-3631; Rev 2; 10/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Pin Configuration appears at end of data sheet.
SPI is a trademark of Motorola, Inc.
cdma2000 is a registered trademark of Telecommunications
Industry Association.
D = Dry pack.
*
EP = Exposed pad.
+
Denotes a lead-free/RoHS-compliant package.
EVALUATION KIT
AVAILABLE
MAX5894
14-Bit, 500Msps, Interpolating and Modulating
Dual DAC with CMOS Inputs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(DV
DD1.8
= AV
DD1.8
= 1.8V, AV
CLK
= AV
DD3.3
= DV
DD3.3
= 3.3V, modulator off, 2x interpolation, DATACLK output mode, dual-port
mode, 50 double-terminated outputs, external reference at 1.25V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are
at T
A
= +25°C, unless otherwise noted.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DV
DD1.8
, AV
DD1.8
to GND, DACREF ..................-0.3V to +2.16V
AV
DD3.3
, AV
CLK
, DV
DD3.3
to GND, DACREF........-0.3V to +3.9V
DATACLK, A0–A13, B0–B11,
SELIQ/B13, DATACLK/B12, CS, RESET, SCLK,
DIN and DOUT to GND, DACREF ...-0.3V to (DV
DD3.3
+ 0.3V)
CLKP, CLKN to GND, DACREF..............-0.3V to (AV
CLK
+ 0.3V)
REFIO, FSADJ to GND, DACREF ........-0.3V to (AV
DD3.3
+ 0.3V)
OUTIP, OUTIN, OUTQP,
OUTQN to GND, DACREF..................-1V to (AV
DD3.3
+ 0.3V)
DOUT, DATACLK, DATACLK/B12 Continuous Current........8mA
Continuous Power Dissipation (T
A
= +70°C)
68-Pin QFN (derate 41.7mW/°C above +70°C)
(Note 1) ...................................................................3333.3mW
Junction Temperature......................................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Thermal Resistance θ
JC
(Note 1)....................................0.8°C/W
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STATIC PERFORMANCE
Resolution 14 Bits
Differential Nonlinearity DNL ±0.5 LSB
Integral Nonlinearity INL ±1.0 LSB
Offset Error OS -0.025 0.003 +0.025 %FS
Offset Drift ±0.03 ppm/°C
Full-Scale Gain Error GE
FS
-4 -0.6 +4 %FS
Gain-Error Drift ±110 ppm/°C
Full-Scale Output Current I
OUTFS
220mA
Output Compliance -0.5 +1.1 V
Output Resistance R
OUT
1M
Output Capacitance C
OUT
5pF
DYNAMIC PERFORMANCE
Maximum Clock Frequency f
CLK
500 MHz
Minimum Clock Frequency f
CLK
1 MHz
Maximum DAC Update Rate f
DAC
f
DAC
= f
CLK
or f
DAC
= f
CLK
/2 500 Msps
Minimum DAC Update Rate f
DAC
f
DAC
= f
CLK
or f
DAC
= f
CLK
/2 1 Msps
Maximum Input Data Rate f
DATA
125 MWps
No interpolation -154
2x interpolation -154
f
DATACLK
= 125MHz,
f
OUT
= 16MHz, f
OFFSET
= 10MHz, -12dBFS
4x interpolation -154
Noise Spectral Density
f
DATACLK
= 125MHz,
f
OUT
= 16MHz, f
OFFSET
= 10MHz, 0dBFS
4x interpolation -151
dBFS/
Hz
Note 1: Thermal resistance based on a multilayer board with 4 x 4 via array in exposed pad area.
MAX5894
14-Bit, 500Msps, Interpolating and Modulating
Dual DAC with CMOS Inputs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(DV
DD1.8
= AV
DD1.8
= 1.8V, AV
CLK
= AV
DD3.3
= DV
DD3.3
= 3.3V, modulator off, 2x interpolation, DATACLK output mode, dual-port
mode, 50 double-terminated outputs, external reference at 1.25V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are
at T
A
= +25°C, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
f
OUT
= 10MHz 91
f
OUT
= 30MHz 85
f
DATACLK
= 125MHz,
interpolation off, 0dBFS
f
OUT
= 50MHz 73
f
OUT
= 10MHz 77 89
f
OUT
= 30MHz 86
f
DATACLK
= 125MHz,
2x interpolation, 0dBFS
f
OUT
= 50MHz 85
f
OUT
= 10MHz 91
f
OUT
= 30MHz 86
In-Band SFDR
(DC to f
DATA
/2)
SFDR
f
DATACLK
= 125MHz,
4x interpolation, 0dBFS
f
OUT
= 50MHz 88
dBc
No interpolation -102
2x interpolation -102
f
DATACLK
= 125MHz,
f
OUT1
= 9MHz, f
OUT2
=
10MHz, -6.1dBFS
4x interpolation -102
2x interpolation,
f
IM
/4 complex
modulation
-73
f
DATA
= 125MHz, f
OUT1
= 79MHz, f
OUT2
=
80MHz, -6.1dBFS
4x interpolation,
f
IM
/4 complex
modulation
-75
f
DATACLK
= 62.5MHz,
f
OUT1
= 9MHz, f
OUT2
=
10MHz, -6.1dBFS
8x interpolation -99
f
DATACLK
= 62.5MHz,
f
OUT1
= 69MHz, f
OUT2
= 70MHz, -6.1dBFS
8x interpolation,
f
IM
/4 complex
modulation
-70
Two-Tone IMD TTIMD
f
DATACLK
= 62.5MHz,
f
OUT1
= 179MHz, f
OUT2
= 180MHz, -6.1dBFS
8x, highpass
interpolation,
f
IM
/4 complex
modulation
-63
dBc
Four-Tone IMD FTIMD
f
DATACLK
= 125MHz, f
OUT
spaced 1MHz
apart from 32MHz, -12dBFS, 2x
interpolation
-95 dBc
4x interpolation 78
f
DATACLK
= 61.44MHz,
f
OUT
= baseband
8x interpolation 78
f
DATACLK
=
122.88MHz, f
OUT
=
61.44MHz
2x interpolation,
f
IM
/4 complex
modulation
74
ACLR for WCDMA
(Note 3)
ACLR
f
DATACLK
=
122.88MHz, f
OUT
=
122.88MHz
4x interpolation,
f
IM
/4 complex
modulation
69
dB

MAX5894EGK+TD

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 14-Bit 2Ch 500Msps DAC
Lifecycle:
New from this manufacturer.
Delivery:
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