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MAX5894EGK+TD

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32
MAX5894
14-Bit, 500Msps, Interpolating and Modulating
Dual DAC with CMOS Inputs
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(DV
DD1.8
= AV
DD1.8
= 1.8V, AV
CLK
= AV
DD3.3
= DV
DD3.3
= 3.3V, modulator off, 2x interpolation, DATACLK output mode, dual-port
mode, 50Ω double-terminated outputs, external reference at 1.25V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are
at T
A
= +25°C, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Propagation Delay t
PD
1x interpolation (Note 4) 2.9 ns
Output Rise Time t
RISE
10% to 90% (Note 5) 0.75 ns
Output Fall Time t
FALL
10% to 90% (Note 5) 1 ns
Output Settling Time To 0.5% (Note 5) 11 ns
Output Bandwidth -1dB bandwidth (Note 6) 240 MHz
Passband Width Ripple < -0.01dB
0.4 x
f
DATA
0.604 x f
DATA
, 2x interpolation 100
0.604 x f
DATA
, 4x interpolation 100
Stopband Rejection
0.604 x f
DATA
, 8x interpolation 100
dB
1x interpolation 22
2x interpolation 70
4x interpolation 146
Data Latency
8x interpolation 311
Clock
Cycles
DAC INTERCHANNEL MATCHING
Gain Match ∆Gain f
OUT
= DC - 80MHz, I
OUTFS
= 20mA ±0.1 dB
Gain-Match Tempco ∆Gain/°C I
OUTFS
= 20mA ±0.02 ppm/°C
Phase Match ∆Phase f
OUT
= 60MHz, I
OUTFS
= 20mA ±0.13 Deg
Phase-Match Tempco ∆Phase/°C f
OUT
= 60MHz, I
OUTFS
= 20mA ±0.006 Deg/°C
DC Gain Match I
OUTFS
= 20mA -0.25 0.04 +0.25 dB
Channel-to-Channel Crosstalk f
OUT
= 50MHz, f
DAC
= 250MHz, 0dBFS -90 dB
REFERENCE
Reference Input Range 0.125 1.250 V
Reference Output Voltage V
REFIO
Internal reference 1.14 1.20 1.27 V
Reference Input Resistance R
REFIO
10 kΩ
Reference Voltage Drift ±50 ppm/°C
CMOS LOGIC INPUT/OUTPUT (A13–A0, SELIQ/B13, DATACLK/B12, B11–B0, DATACLK)
Input High Voltage V
IH
0.7 x
DV
DD1.8
V
Input Low Voltage V
IL
0.3 x
DV
DD1.8
V
Input Current I
IN
-20 ±1 +20 µA
Input Capacitance C
IN
3pF
MAX5894
14-Bit, 500Msps, Interpolating and Modulating
Dual DAC with CMOS Inputs
_______________________________________________________________________________________ 5
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output High Voltage V
OH
200µA load
0.8 x
DV
DD3.3
V
Output Low Voltage V
OL
200µA load
0.2 x
DV
DD3.3
V
Output Leakage Current Three-state 1 µA
Rise/Fall Time C
LOAD
= 10pF, 20% to 80% 1.6 ns
CLOCK INPUT (CLKP, CLKN)
Sine-wave input > 1.5
Differential Input Voltage Swing V
DIFF
Square-wave input > 0.5
V
P-P
Differential Input Slew Rate > 100 V/µs
Common-Mode Voltage V
COM
AC-coupled AV
CLK
/2 V
Input Resistance R
CLK
5kΩ
Input Capacitance C
CLK
3pF
Minimum Clock Duty Cycle 45 %
Maximum Clock Duty Cycle 55 %
CLKP/CLKN, DATACLK TIMING (Figure 4) (Notes 7, 8)
CLK to DATACLK Delay t
D
DATACLK output mode, C
LOAD
= 10pF 6.2 ns
Capturing rising edge 1.0
Data Hold Time, DATACLK
Input/Output (Pin 14)
t
DH
Capturing falling edge 2.1
ns
Capturing rising edge 0.4
Data Setup Time, DATACLK
Input/Output (Pin 14)
t
DS
Capturing falling edge -0.7
ns
Capturing rising edge 1.0
Data Hold Time, DATACLK/B10
Input/Output (Pin 27)
t
DH
Capturing falling edge 2.3
ns
Capturing rising edge 0.2
Data Setup Time, DATACLK/B10
Input/Output (Pin 27)
t
DS
Capturing falling edge -0.4
ns
SERIAL-PORT INTERFACE TIMING (Figure 3) (Note 7)
SCLK Frequency f
SCLK
10 MHz
CS Setup Time t
SS
2.5 ns
Input Hold Time t
SDH
0ns
Input Setup Time t
SDS
4.5 ns
Data Valid Duration t
SDV
6.5 16.5 ns
ELECTRICAL CHARACTERISTICS (continued)
(DV
DD1.8
= AV
DD1.8
= 1.8V, AV
CLK
= AV
DD3.3
= DV
DD3.3
= 3.3V, modulator off, 2x interpolation, DATACLK output mode, dual-port
mode, 50Ω double-terminated outputs, external reference at 1.25V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are
at T
A
= +25°C, unless otherwise noted.) (Note 2)
MAX5894
14-Bit, 500Msps, Interpolating and Modulating
Dual DAC with CMOS Inputs
6 _______________________________________________________________________________________
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLIES
Digital Supply Voltage DV
DD1.8
1.71 1.8 1.89 V
Digital I/O Supply Voltage DV
DD3.3
3.0 3.3 3.6 V
Clock Supply Voltage AV
CLK
3.135 3.3 3.465 V
AV
DD3.3
3.135 3.3 3.465
Analog Supply Voltage
AV
DD1.8
1.71 1.8 1.89
V
I
AVDD3.3
f
CLK
= 250MHz, 2x interpolation, 0dBFS,
f
OUT
= 10MHz
110 130
Analog Supply Current
I
AVDD1.8
f
CLK
= 250MHz, 2x interpolation, 0dBFS,
f
OUT
= 10MHz
27 32
mA
Digital Supply Current I
DVDD1.8
f
CLK
= 250MHz, 2x interpolation, 0dBFS,
f
OUT
= 10MHz
225 250 mA
Digital I/O Supply Current I
DVDD3.3
f
CLK
= 250MHz, 2x interpolation, 0dBFS,
f
OUT
= 10MHz
21 32 mA
Clock Supply Current I
AVCLK
f
CLK
= 250MHz, 2x interpolation, 0dBFS,
f
OUT
= 10MHz
35mA
Total Power Dissipation P
TOTAL
f
CLK
= 250MHz, 2x interpolation, 0dBFS,
f
OUT
= 10MHz
886 mW
AV
DD3.3
450
AV
DD1.8
1
DV
DD1.8
10
DV
DD3.3
100
Power-Down Current
All I/O are static high or
low, bit 2 to bit 4 of
address 00h are set high
AV
CLK
1
µA
AV
DD3.3
Power-Supply Rejection
Ratio
PSRR
A
(Note 9) 0.05 %FS/V
ELECTRICAL CHARACTERISTICS (continued)
(DV
DD1.8
= AV
DD1.8
= 1.8V, AV
CLK
= AV
DD3.3
= DV
DD3.3
= 3.3V, modulator off, 2x interpolation, DATACLK output mode, dual-port
mode, 50Ω double-terminated outputs, external reference at 1.25V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are
at T
A
= +25°C, unless otherwise noted.) (Note 2)
Note 2: All limit specifications are 100% tested at T
A
≥ +25°C. Specifications at T
A
< +25°C are guaranteed by design and characterization.
Note 3: 3.84MHz bandwidth, single carrier.
Note 4: Excludes data latency.
Note 5: Measured single-ended into a 50Ω load.
Note 6: Excludes sin(x)/x rolloff.
Note 7: Guaranteed by design and characterization.
Note 8: Setup and hold time specifications characterized with 3.3V CMOS logic levels.
Note 9: Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32

MAX5894EGK+TD

Mfr. #:
Buy MAX5894EGK+TD
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 14-Bit 2Ch 500Msps DAC
Lifecycle:
New from this manufacturer.
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