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ADV7283BCPZ-RL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
ADV7283 Data Sheet
Rev. A | Page 6 of 21
ANALOG SPECIFICATIONS
A
VDD
, D
VDD
, and P
VDD
= 1.71 V to 1.89 V, D
VDDIO
= 1.62 V to 3.63 V, specified at operating temperature range, unless otherwise noted.
Specifications guaranteed by characterization.
Table 3.
Parameter Test Conditions/Comments Min Ty p Max Unit
CLAMP CIRCUITRY
External Clamp Capacitor 0.1 µF
Input Impedance Clamps switched off 10 MΩ
Large Clamp Source Current 0.4 mA
Large Clamp Sink Current 0.4 mA
Fine Clamp Source Current 10 µA
Fine Clamp Sink Current 10 µA
CLOCK AND I
2
C TIMING SPECIFICATIONS
A
VDD
, D
VDD
, and P
VDD
= 1.71 V to 1.89 V, D
VDDIO
= 1.62 V to 3.63 V, specified at operating temperature range, unless otherwise noted.
Specifications guaranteed by characterization.
Table 4.
Parameter Symbol Min Ty p Max Unit
SYSTEM CLOCK AND CRYSTAL
Nominal Frequency 28.63636 MHz
Frequency Stability ±50 ppm
I
2
C PORT
SCLK Frequency 400 kHz
SCLK Minimum Pulse Width High t
1
0.6 µs
SCLK Minimum Pulse Width Low t
2
1.3 µs
Hold Time (Start Condition) t
3
0.6 µs
Setup Time (Start Condition) t
4
0.6 µs
SDATA Setup Time t
5
100 ns
SCLK and SDATA Rise Times
t
6
300 ns
SCLK and SDATA Fall Times
t
7
300 ns
Setup Time (Stop Condition) t
8
0.6 µs
RESET
INPUT
RESET
Pulse Width 5 ms
Figure 2. I
2
C Timing Diagram
SDATA
SCLK
t
3
t
5
t
3
t
4
t
8
t
6
t
7
t
2
t
1
12347-002
Data Sheet ADV7283
Rev. A | Page 7 of 21
PIXEL PORT TIMING SPECIFICATIONS
A
VDD
, D
VDD
, and P
VDD
= 1.71 V to 1.89 V, D
VDDIO
= 1.62 V to 3.63 V, specified at operating temperature range, unless otherwise noted.
Specifications guaranteed by characterization.
Table 5.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
CLOCK OUTPUTS
LLC Output Frequency 27 MHz
LLC Mark Space Ratio t
16
:t
17
45:55 55:45 % duty cycle
DATA AND CONTROL OUTPUTS
Data Output Transitional Time t
18
Negative clock edge to start of valid data
(t
SETU P
= t
17
− t
18
)
3.8 ns
t
19
End of valid data to negative clock edge
(t
HOLD
= t
16
− t
19
)
6.9 ns
Figure 3. Pixel Port and Control Output Timing Diagram
OUTPUT LLC
P0 TO P7 OUTPUTS
t
16
t
17
t
18
t
19
12347-201
ADV7283 Data Sheet
Rev. A | Page 8 of 21
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
1
Rating
A
VDD
to GND 2.2 V
D
VDD
to GND 2.2 V
P
VDD
to GND 2.2 V
D
VDDIO
to GND 4 V
P
VDD
to D
VDD
−0.9 V to +0.9 V
A
VDD
to D
VDD
−0.9 V to +0.9 V
Digital Inputs (
RESET
, ALSB,
SDATA, SCLK,
PWRDWN
)
Voltage
GND − 0.3 V to D
VDDIO
+ 0.3 V
Digital Outputs (P7 to P0,
INTRQ
, LLC) Voltage
GND − 0.3 V to D
VDDIO
+ 0.3 V
Analog Inputs (X TA LN , A
IN
1 to
A
IN
6) to Ground
GND − 0.3 V to A
VDD
+ 0.3 V
Maximum Junction Temperature
(T
J
max)
140°C
Storage Temperature Range −65°C to +150°C
1
The absolute maximum ratings assume that the DGND pins and the exposed
pad of the ADV7283 are connected together to a common ground plane
(GND). This is part of the recommended layout scheme. See the PCB Layout
Recommendations section for more information. The absolute maximum
ratings are stated in relation to this common ground plane.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
The thermal resistance values in Table 7 are specified for the
device soldered onto a 4-layer printed circuit board (PCB) with
a common ground plane (GND) and with the exposed pad of
the device connected to DGND. The values in Table 7 are
maximum values.
Table 7. Thermal Resistance for the 32-Lead LFCSP
Thermal Characteristic Symbol Value Unit
Junction to Ambient Thermal
Resistance (Still Air)
θ
JA
32.5 °C/W
Junction to Case Thermal
Resistance
θ
JC
2.3 °C/W
ESD CAUTION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

ADV7283BCPZ-RL

Mfr. #:
Buy ADV7283BCPZ-RL
Manufacturer:
Analog Devices Inc.
Description:
Video ICs 10-bit SD Video Decoder
Lifecycle:
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