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MAX13101EETL+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
General Description
The MAX13101E/MAX13102E/MAX13103E/MAX13108E
16-bit bidirectional CMOS logic-level translators pro-
vide the level shifting necessary to allow data transfer in
multivoltage systems. These devices are inherently
bidirectional due to their design and do not require the
use of a direction input. Externally applied voltages,
V
CC
and V
L
, set the logic levels on either side of the
devices. Logic signals present on the V
L
side of the
device appear as a higher voltage logic signal on the
V
CC
side of the device, and vice-versa.
The MAX13101E/MAX13102E/MAX13103E feature an
enable input (EN) that, when low, reduces the V
CC
and
V
L
supply currents to less than 2µA. The MAX13108E
features a multiplexing input (MULT) that selects one
byte between the two, thus allowing multiplexing of the
signals. The MAX13101E/MAX13102E/MAX13103E/
MAX13108E have ±15kV ESD protection on the I/O V
CC
side for greater protection in applications that route sig-
nals externally. Three different output configurations are
available during shutdown, allowing the I/O on the V
CC
side or the V
L
side to be put in a high-impedance state
or pulled to ground through an internal 6kΩ resistor.
The MAX13101E/MAX13102E/MAX13103E/MAX13108E
accept V
CC
voltages from +1.65V to +5.5V and V
L
voltages from +1.2V to V
CC
, making them ideal for data
transfer between low-voltage ASICs/PLDs and higher
voltage systems. The MAX13101E/MAX13102E/
MAX13103E/MAX13108E are available in 36-bump
WLP and 40-pin TQFN packages, and operate over the
extended -40°C to +85°C temperature range.
Applications
Features
♦ Wide Supply Voltage Range
V
CC
Range of 1.65V to 5.5V
V
L
Range of 1.2V to V
CC
♦ ESD Protection on I/O V
CC
Lines
±15kV Human Body Model
♦ Up to 20Mbps Throughput
♦ Low 0.03µA Typical Quiescent Current
♦ WLP and TQFN Packages
MAX13101E/MAX13102E/MAX13103E/MAX13108E
16-Channel Buffered CMOS
Logic-Level Translators
________________________________________________________________
Maxim Integrated Products
1
Pin Configurations
19-3802; Rev 3; 6/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Ordering Information/Selector Guide continued at end of data sheet.
Ordering Information/Selector Guide
PART PIN-PACKAGE
DATA
RATE (Mbps)
I/O V
L
STATE
DURING SHUTDOWN
I/O V
CC
STATE
DURING SHUTDOWN
MULTIPLEXER
FEATURE
MAX13101EEWX+*
36 WLP**
3.06mm x 3.06mm
20 High impedance 6kΩ to GND No
MAX13101EETL+
40 TQFN-EP***
5mm x 5mm x 0.8mm
20 High impedance 6kΩ to GND No
Note:
All devices are specified over the -40°C to +85°C operating temperature range.
MAX13101E
MAX13102E
MAX13103E
TQFN
+
TOP VIEW OF BOTTOM LEADS
56
4
3
I/O V
L
14
I/O V
L
16
V
L
V
CC
I/O V
CC
16
I/O V
L
13
I/O V
L
3
I/O V
L
1
V
L
I/O V
L
4
V
CC
I/O V
CC
1
11
12
I/O V
L
7
14
15
16
17
I/O V
L
8
I/O V
L
9
I/O V
CC
7
I/O V
CC
8
I/O V
CC
9
I/O V
CC
10
I/O V
L
15
I/O V
L
2
13
7
I/O V
L
10
I/O V
CC
11
8
*EXPOSED PAD CONNECTED TO GROUND
I/O V
L
11
I/O V
L
12
EN
I/O V
CC
12
GND
9 10
I/O V
L
6
2
I/O V
CC
6
I/O V
L
5
1
I/O V
CC
5
GND
26 25
27
28 24 23 22 212930
I/O V
CC
15
I/O V
CC
14
I/O V
CC
13
I/O V
CC
2
I/O V
CC
3
I/O V
CC
4
18
19
20
40
39
37
36
35
34
38
33
32
31
GND
*EP
CMOS Logic-Level
Translation
Portable Equipment
Cell Phones
PDAs
Digital Still Cameras
Smart Phones
+
Denotes a lead-free/RoHS-compliant package.
*
Future product—contact factory for availability.
**
WLP bumps are in a 6 x 6 array.
***
EP = Exposed pad.
Pin Configurations continued at end of data sheet.
Typical Operating Circuit appears at end of data sheet.
MAX13101E/MAX13102E/MAX13103E/MAX13108E
16-Channel Buffered CMOS
Logic-Level Translators
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
CC
= +1.65V to +5.5V, V
L
= +1.2V to V
CC
, EN = V
L
(MAX13101E/MAX13102E/MAX13103E), MULT = V
L
or GND (MAX13108E),
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +1.65V, V
L
= +1.2V, T
A
= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
V
CC
...........................................................................-0.3V to +6V
V
L...........................................................................................
-0.3V to +6V
I/O V
CC_
......................................................-0.3V to (V
CC
+ 0.3V)
I/O V
L_.....................................................................
-0.3V to (V
L
+ 0.3V)
EN, MULT .................................................................-0.3V to +6V
Short-Circuit Duration I/O V
L_
, I/O V
CC_
to GND .......Continuous
Continuous Power Dissipation (T
A
= +70°C)
36-Bump WLP (derate 17.0mW/°C above +70°C).....1361mW
40-Pin TQFN (derate 35.7mW/°C above +70°C) .......2857mW
Operating Temperature Range ...........................-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
UNITS
POWER SUPPLIES
V
L
Supply Range V
L
1.2
V
CC
V
V
CC
Supply Range V
CC
1.65 5.50
V
Supply Current from V
CC
I
QVCC
I/O V
CC
_ = GND, I/O V
L
_ = GND
or I/O V
CC
_ = V
CC
, I/O V
L
_ = V
L
,
EN = V
L
, MULT = GND or V
L
0.03
10 µA
Supply Current from V
L
I
QVL
I/O V
CC
_ = GND, I/O V
L
_ = GND
or I/O V
CC
_ = V
CC
, I/O V
L
_ = V
L
,
EN = V
L
, MULT = GND or V
L
0.03
20 µA
V
CC
Shutdown Supply Current
I
SHDN-VCC
T
A
= +25°C, EN = GND, I/O V
CC
_ = GND,
I/O V
L
_ = GND,
MAX13101E/MAX13102E/MAX13103E
0.03
1µA
V
L
Shutdown Supply Current I
SHDN-VL
T
A
= +25°C, EN = GND, I/O V
CC
_ = GND,
I/O V
L
_ = GND,
MAX13101E/MAX13102E/MAX13103E
0.03
2µA
T
A
= +25°C, EN = GND,
MAX13102E/MAX13103E
0.02
1
I/O V
CC
_ Tri-State Output
Leakage Current
T
A
= + 25°C , M U LT = GN D (I/O V
C C
1 - I/O V
C C
8)
or M U LT = V
L
( I/O V
C C
9 - I/O V
C C
16)
M AX13108E
0.02
1
µA
T
A
= +25°C, EN = GND, MAX13101E/
MAX13103E
0.02
1
I/O V
L
_ Tri-State Output Leakage
Current
T
A
= +25°C, MULT = GND (I/O V
L
1 - I/O
V
L
8) or MULT = V
L
(I/OV
L
9 - I/O V
L
16)
MAX13108E
0.02
1
µA
I/O V
L
_ Pulldown Resistance
During Shutdown
EN = GND, MAX13102E 4 10 kΩ
MAX13101E/MAX13102E/MAX13103E/MAX13108E
16-Channel Buffered CMOS
Logic-Level Translators
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +1.65V to +5.5V, V
L
= +1.2V to V
CC
, EN = V
L
(MAX13101E/MAX13102E/MAX13103E), MULT = V
L
or GND (MAX13108E),
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +1.65V, V
L
= +1.2V, T
A
= +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
I/O V
CC
_ Pulldown Resistance
During Shutdown
EN = GND, MAX13101E 4 10 kΩ
EN or MULT Input Leakage
Current
T
A
= +25°C 1 µA
LOGIC-LEVEL THRESHOLDS
I/O V
L
_ Input-Voltage High
Threshold
V
IHL
2/3 x
V
L
V
I/O V
L
_ Input-Voltage Low
Threshold
V
ILL
1/3 x
V
L
V
I/O V
CC
_ Input-Voltage High
Threshold
V
IHC
2/3 x
V
CC
V
I/O V
CC
_ Input-Voltage Low
Threshold
V
ILC
1/3 x
V
CC
V
EN, MULT Input-Voltage High
Threshold
V
IH-SHDN
V
L
- 0.4
V
EN, MULT Input-Voltage Low
Threshold
V
IL-SHDN
0.4 V
I/O V
L
_ Output-Voltage High V
OHL
I/O V
L
_ sour ce cur r ent = 20µA, I/O V
C C
_ ≥ V
IH C
V
L
- 0.4
V
I/O V
L
_ Output-Voltage Low V
OLL
I/O V
L
_ sink current = 20µA, I/O V
CC
_ ≤ V
ILC
0.4 V
I/O V
CC
_ Output-Voltage High V
OHC
I/O V
C C
_ sour ce cur r ent = 20µA, I/O V
L
_ ≥ V
IH L
V
C C
- 0.4
V
I/O V
CC
_ Output-Voltage Low V
OLC
I/O V
CC
_ sink current = 20µA, I/O V
L
_ ≤ V
ILL
0.4 V
RISE/FALL-TIME ACCELERATOR STAGE
I/O V
CC
side
V
CC
/ 2
Transition-Detect Threshold
I/O V
L
side
V
L
/ 2
V
Accelerator Pulse Duration V
L
= 1.2V, V
CC
= 1.65V 20 ns
V
L
= 1.2V, V
CC
= 1.65V 60
I/O V
L
_ Output-Accelerator Sink
Impedance
V
L
= 5V, V
CC
= 5V 5
Ω
V
L
= 1.2V, V
CC
= 1.65V 15
I/O V
CC
_ Output-Accelerator Sink
Impedance
V
L
= 5V, V
CC
= 5V 5
Ω
V
L
= 1.2V, V
CC
= 1.65V 30
I/O V
L
_ Output-Accelerator
Source Impedance
V
L
= 5V, V
CC
= 5V 5
Ω
V
L
= 1.2V, V
CC
= 1.65V 20
I/O V
CC
_
Output-Accelerator
Source Impedance
V
L
= 5V, V
CC
= 5V 7
Ω
ESD PROTECTION
I/O V
CC
_ Human Body Model
±15
kV
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

MAX13101EETL+T

Mfr. #:
Buy MAX13101EETL+T
Manufacturer:
Maxim Integrated
Description:
Translation - Voltage Levels 16-Ch 20Mbps 5.5V Logic Level Tr
Lifecycle:
New from this manufacturer.
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