MAX13101E/MAX13102E/MAX13103E/MAX13108E
16-Channel Buffered CMOS
Logic-Level Translators
10 ______________________________________________________________________________________
Pin Description—MAX13101E/MAX13102E/MAX13103E (continued)
PIN
TQFN WLP
NAME
FUNCTION
19 D5
I/O V
CC
14
Input/Output 14. Referenced to V
CC
.
20 E5
I/O V
CC
13
Input/Output 13. Referenced to V
CC
.
22 F5
I/O V
CC
12
Input/Output 12. Referenced to V
CC
.
23 D4
I/O V
CC
11
Input/Output 11. Referenced to V
CC
.
24 E4
I/O V
CC
10
Input/Output 10. Referenced to V
CC
.
25 F4
I/O V
CC
9
Input/Output 9. Referenced to V
CC
.
26 D3
I/O V
CC
8
Input/Output 8. Referenced to V
CC
.
27 E3
I/O V
CC
7
Input/Output 7. Referenced to V
CC
.
28 F3
I/O V
CC
6
Input/Output 6. Referenced to V
CC
.
29 D2
I/O V
CC
5
Input/Output 5. Referenced to V
CC
.
31 E2
I/O V
CC
4
Input/Output 4. Referenced to V
CC
.
32 F2
I/O V
CC
3
Input/Output 3. Referenced to V
CC
.
33 D1
I/O V
CC
2
Input/Output 2. Referenced to V
CC
.
34 E1
I/O V
CC
1
Input/Output 1. Referenced to V
CC
.
37 B1
I/O V
L
1
Input/Output 1. Referenced to V
L
.
38 C1
I/O V
L
2
Input/Output 2. Referenced to V
L
.
39 A2
I/O V
L
3
Input/Output 3. Referenced to V
L
.
40 B2
I/O V
L
4
Input/Output 4. Referenced to V
L
.
EP Exposed Pad. Connect EP to GND.
Pin Description—MAX13108E
PIN
TQFN WLP
NAME
FUNCTION
1, 21, 30
D6 GND Ground
2 C2
I/O V
L
5
Input/Output 5. Referenced to V
L
.
3 A3
I/O V
L
6
Input/Output 6. Referenced to V
L
.
4 B3
I/O V
L
7
Input/Output 7. Referenced to V
L
.
5 C3
I/O V
L
8
Input/Output 8. Referenced to V
L
.
6 A4
I/O V
L
9
Input/Output 9. Referenced to V
L
.
7 B4
I/O V
L
10
Input/Output 10. Referenced to V
L
.
8 C4
I/O V
L
11
Input/Output 11. Referenced to V
L
.
9 A5
I/O V
L
12
Input/Output 12. Referenced to V
L
.
MAX13101E/MAX13102E/MAX13103E/MAX13108E
16-Channel Buffered CMOS
Logic-Level Translators
______________________________________________________________________________________ 11
Pin Description—MAX13108E (continued)
PIN
TQFN WLP
NAME
FUNCTION
10 C6 MULT
Multiplexing Input. Drive MULT low to enable channels 9 to 16. Driving MULT low puts
channels 1 to 8 into tri-state. Drive MULT to V
CC
or V
L
to enable channels 1 to 8. Driving
MULT to V
CC
or V
L
puts channels 9 to 16 into tri-state.
11 B5
I/O V
L
13
Input/Output 13. Referenced to V
L
.
12 C5
I/O V
L
14
Input/Output 14. Referenced to V
L
.
13 A6
I/O V
L
15
Input/Output 15. Referenced to V
L
.
14 B6
I/O V
L
16
Input/Output 16. Referenced to V
L
.
15, 36 A1 V
L
Logic Supply Voltage, +1.2V V
L
V
CC
. Bypass V
L
to GND with a 0.1µF capacitor.
16, 35 F1 V
CC
V
CC
Supply Voltage, +1.65V V
CC
+5.5V. Bypass V
CC
to GND with a 0.1µF capacitor.
For full ESD protection, connect a 1.0µF capacitor from V
CC
to GND, located as close to the
V
CC
input as possible.
17 E6
I/O V
CC
16
Input/Output 16. Referenced to V
CC
.
18 F6
I/O V
CC
15
Input/Output 15. Referenced to V
CC
.
19 D5
I/O V
CC
14
Input/Output 14. Referenced to V
CC
.
20 E5
I/O V
CC
13
Input/Output 13. Referenced to V
CC
.
22 F5
I/O V
CC
12
Input/Output 12. Referenced to V
CC
.
23 D4
I/O V
CC
11
Input/Output 11. Referenced to V
CC
.
24 E4
I/O V
CC
10
Input/Output 10. Referenced to V
CC
.
25 F4
I/O V
CC
9
Input/Output 9. Referenced to V
CC
.
26 D3
I/O V
CC
8
Input/Output 8. Referenced to V
CC
.
27 E3
I/O V
CC
7
Input/Output 7. Referenced to V
CC
.
28 F3
I/O V
CC
6
Input/Output 6. Referenced to V
CC
.
29 D2
I/O V
CC
5
Input/Output 5. Referenced to V
CC
.
31 E2
I/O V
CC
4
Input/Output 4. Referenced to V
CC
.
32 F2
I/O V
CC
3
Input/Output 3. Referenced to V
CC
.
33 D1
I/O V
CC
2
Input/Output 2. Referenced to V
CC
.
34 E1
I/O V
CC
1
Input/Output 1. Referenced to V
CC
.
37 B1
I/O V
L
1
Input/Output 1. Referenced to V
L
.
38 C1
I/O V
L
2
Input/Output 2. Referenced to V
L
.
39 A2
I/O V
L
3
Input/Output 3. Referenced to V
L
.
40 B2
I/O V
L
4
Input/Output 4. Referenced to V
L
.
EP Exposed Pad. Connect EP to GND.
MAX13101E/MAX13102E/MAX13103E/MAX13108E
16-Channel Buffered CMOS
Logic-Level Translators
12 ______________________________________________________________________________________
EN
V
CC
I/O V
L
1
I/O V
L
2
I/O V
L
3
I/O V
L
4
I/O V
L
5
I/O V
L
6
I/O V
L
7
I/O V
L
8
I/O V
L
9
I/O V
L
10
I/O V
L
11
I/O V
L
12
I/O V
L
13
I/O V
L
14
I/O V
L
15
I/O V
L
16
I/O V
CC
1
I/O V
CC
2
I/O V
CC
3
I/O V
CC
4
I/O V
CC
5
I/O V
CC
6
I/O V
CC
7
I/O V
CC
8
I/O V
CC
9
I/O V
CC
10
I/O V
CC
11
I/O V
CC
12
I/O V
CC
13
I/O V
CC
14
I/O V
CC
15
GND
I/O V
CC
16
V
L
MAX13101E
MAX13102E
MAX13103E
Functional Diagrams
MULT
I/O V
L
1
I/O V
L
2
I/O V
L
3
I/O V
L
4
I/O V
L
5
I/O V
L
6
I/O V
L
7
I/O V
L
8
I/O V
L
9
I/O V
L
10
I/O V
L
11
I/O V
L
12
I/O V
L
13
I/O V
L
14
I/O V
L
15
I/O V
L
16
I/O V
CC
1
I/O V
CC
2
I/O V
CC
3
I/O V
CC
4
I/O V
CC
5
I/O V
CC
6
I/O V
CC
7
I/O V
CC
8
I/O V
CC
9
I/O V
CC
10
I/O V
CC
11
I/O V
CC
12
I/O V
CC
13
I/O V
CC
14
I/O V
CC
15
I/O V
CC
16
GND
MAX13108E
V
L
V
CC

MAX13101EETL+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Translation - Voltage Levels 16-Ch 20Mbps 5.5V Logic Level Tr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union