MAX13101E/MAX13102E/MAX13103E/MAX13108E
Pin Description—MAX13101E/MAX13102E/MAX13103E
NAME
I/O V
L
5
Input/Output 5. Referenced to V
L
.
3 A3
I/O V
L
6
Input/Output 6. Referenced to V
L
.
4 B3
I/O V
L
7
Input/Output 7. Referenced to V
L
.
5 C3
I/O V
L
8
Input/Output 8. Referenced to V
L
.
6 A4
I/O V
L
9
Input/Output 9. Referenced to V
L
.
7 B4
I/O V
L
10
Input/Output 10. Referenced to V
L
.
8 C4
I/O V
L
11
Input/Output 11. Referenced to V
L
.
9 A5
I/O V
L
12
Input/Output 12. Referenced to V
L
.
10 C6 EN Global Enable Input. Pull EN low for shutdown. Drive EN to V
CC
or V
L
for normal operation.
11 B5
I/O V
L
13
Input/Output 13. Referenced to V
L
.
12 C5
I/O V
L
14
Input/Output 14. Referenced to V
L
.
13 A6
I/O V
L
15
Input/Output 15. Referenced to V
L
.
14 B6
I/O V
L
16
Input/Output 16. Referenced to V
L
.
15, 36 A1 V
L
Logic Supply Voltage, +1.2V ≤ V
L
≤ V
CC
. Bypass V
L
to GND with a 0.1µF capacitor.
16, 35 F1 V
CC
V
CC
Supply Voltage, +1.65V ≤ V
CC
≤ +5.5V. Bypass V
CC
to GND with a 0.1µF capacitor.
For full ESD protection, connect a 1.0µF capacitor from V
CC
to GND, located as close to the
V
CC
input as possible.
17 E6
I/O V
CC
16
Input/Output 16. Referenced to V
CC
.
18 F6
I/O V
CC
15
Input/Output 15. Referenced to V
CC
.
RAIL-TO-RAIL DRIVING (DRIVING I/O V
L
)
10ns/div
MAX13101E-3/8E toc13
I/0 V
L_
1V/div
I/0 V
CC_
2V/div
GND
GND
C
I/OVCC_
= 50pF
Typical Operating Characteristics (continued)
(V
CC
= 3.3V, V
L
= 1.8V, data rate = 20Mbps, T
A
= +25°C, unless otherwise noted.)
16-Channel Buffered CMOS
Logic-Level Translators
_______________________________________________________________________________________ 9
PROPAGATION DELAY vs. CAPACITIVE LOAD
ON I/O V
L_
(DRIVING I/O V
CC_
)
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
MAX13101-3/8E toc12
10 20 30 40 50
0
1
2
3
4
5
t
PHL
t
PLH
FIGURES 2a, 2b
