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LTC3550EDHC-1#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
LTC3550-1
19
35501f
APPLICATIO S I FOR ATIO
WUU
U
However, the user may wish to repeat the previous analysis
to take the buck regulator’s power dissipation into account.
Equation (6) can be modifi ed to take into account the
temperature rise due to the buck regulator:
I
CT P
VV
BAT
A D BUCK JA
IN BAT JA
=
°−105 – ( • )
(– •
()
)
θ
θ
(7)
For optimum performance, it is critical that the exposed
metal pad on the backside of the LTC3550-1 package is
properly soldered to the PC board ground. When correctly
soldered to a 2500mm
2
double sided 1oz copper board,
the LTC3550-1 has a thermal resistance of approximately
40°C/W. Failure to make thermal contact between the ex-
posed pad on the backside of the package and the copper
board will result in thermal resistances far greater than
40°C/W. As an example, a correctly soldered LTC3550-1
can deliver over 800mA to a battery from a 5V supply
at room temperature. Without a good backside thermal
connection, this number would drop to much less than
500mA.
Battery Charger Stability Considerations
The constant-voltage mode feedback loop is stable without
any compensation provided a battery is connected to the
charger output. When the charger is in constant-current
mode, the charge current program pin (IDC or IUSB) is in
the feedback loop, not the battery. The constant-current
mode stability is affected by the impedance at the charge
current program pin. With no additional capacitance on
this pin, the charger is stable with program resistor val-
ues as high as 20k (I
CHG
= 50mA); however, additional
capacitance on these nodes reduces the maximum allowed
program resistor value.
Checking Regulator Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to (ΔI
LOAD
• ESR), where ESR is the effective series
resistance of C
OUT
. ΔI
LOAD
also begins to charge or dis-
charge C
OUT
, which generates a feedback error signal. The
regulator loop then acts to return V
OUT
to its steady state
value. During this recovery time V
OUT
can be monitored
for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in paral-
lel with C
OUT
, causing a rapid drop in V
OUT
. No regulator
can deliver enough current to prevent this problem if the
load switch resistance is low and it is driven quickly. The
only solution is to limit the rise time of the switch drive
so that the load rise time is limited to approximately (25
• C
LOAD
). Thus, a 10µF capacitor charging to 3.3V would
require a 250µs rise time, limiting the charging current
to about 130mA.
Protecting the USB Pin and Wall Adapter Input from
Overvoltage Transients
Caution must be exercised when using ceramic capaci-
tors to bypass the USBIN pin or the wall adapter inputs.
High voltage transients can be generated when the USB
or wall adapter is hot-plugged. When power is supplied
via the USB bus or wall adapter, the cable inductance
along with the self resonant and high Q characteristics of
ceramic capacitors can cause substantial ringing which
could exceed the maximum voltage ratings and damage
the LTC3550-1. Refer to Linear Technology Application
Note 88, entitled “Ceramic Input Capacitors Can Cause
Overvoltage Transients” for a detailed discussion of this
problem. The long cable lengths of most wall adapters
and USB cables makes them especially susceptible to this
problem. To bypass the USB and the wall adapter inputs,
add a 1Ω resistor in series with a ceramic capacitor to
lower the effective Q of the network and greatly reduce the
ringing. A tantalum, OS-CON, or electrolytic capacitor can
be used in place of the ceramic and resistor, as their higher
ESR reduces the Q, thus reducing the voltage ringing.
The oscilloscope photograph in Figure 4 shows how seri-
ous the overvoltage transient can be for the USB and wall
adapter inputs. For both traces, a 5V supply is hot-plugged
using a three foot long cable. For the top trace, only a
4.7µF ceramic X5R capacitor (without the recommended
1Ω series resistor) is used to locally bypass the input.
This trace shows excessive ringing when the 5V cable
is inserted, with the overvoltage spike reaching 10V. For
LTC3550-1
20
35501f
APPLICATIO S I FOR ATIO
WUU
U
the bottom trace, a 1Ω resistor is added in series with the
4.7µF capacitor to locally bypass the 5V input. This trace
shows the clean response resulting from the addition of
the 1Ω resistor.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3550-1. These items are also illustrated graph-
ically in Figures 5 and 6. Check the following in your
layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V
CC
trace should be kept short, direct
and wide.
2. Does the V
OUT
pin connect directly to the output?
3. Does the (+) plate of C
IN
connect to V
CC
as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4.
Keep the (–) plates of C
IN
and C
OUT
as close as
possible.
5. Solder the exposed pad on the backside of the package
to PC board ground for optimum thermal performance.
The thermal resistance of the package can be further
enhanced by increasing the area of the copper used for
PC board ground.
Design Example
As a design example, assume the LTC3550-1 is used
in a single lithium-ion battery-powered cellular phone
application. The battery is charged by either plugging
a wall adapter into the phone or putting the phone in a
USB cradle. The optimum charge current for this parti-
cular lithium-ion battery is determined to be 800mA.
Starting with the charger, choosing R
IDC
to be 1.24k
programs the charger for 806mA. Choosing R
IUSB
to
be 2.1k programs the charger for 475mA when charging
from the USB cradle, ensuring that the charger never
exceeds the 500mA maximum current supplied by the
USB port. A good rule of thumb for I
TERMINATE
is one-
tenth the full charge current, so R
ITERM
is picked to be
1.24k (I
TERMINATE
= 80mA).
Moving on to the step-down converter, V
CC
will be pow-
ered from the battery which can range from a maximum
of 4.2V down to about 2.7V. The load current requirement
is a maximum of 600mA but most of the time it will be in
standby mode, requiring only 2mA. Effi ciency at both low
Figure 4. Waveforms Resulting from
Hot-Plugging a 5V Input Supply When
Using Ceramic Bypass Capacitors
4.7μF ONLY
2V/DIV
4.7μF + 1Ω
2V/DIV
20μs/DIV
3550-1 F04
Even with the additional 1Ω resistor, bad design techniques
and poor board layout can often make the overvoltage
problem even worse. System designers often add extra
inductance in series with input lines in an attempt to mini-
mize the noise fed back to those inputs by the application.
In reality, adding these extra inductances only makes the
overvoltage transients worse. Since cable inductance is
one of the fundamental causes of the excessive ringing,
adding a series ferrite bead or inductor increases the ef-
fective cable inductance, making the problem even worse.
For this reason, do not add additional inductance (ferrite
beads or inductors) in series with the USB or wall adapter
inputs. For the most robust solution, 6V transorbs or zener
diodes may also be added to further protect the USB and
wall adapter inputs. Two possible protection devices are
the SM2T from STMicroelectronics and the EDZ series
devices from ROHM.
Always use an oscilloscope to check the voltage wave-
forms at the USBIN and DCIN pins during USB and wall
adapter hot-plug events to ensure that overvoltage
transients have been adequately removed.
LTC3550-1
21
35501f
APPLICATIO S I FOR ATIO
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U
and high load currents is important. With this information
we can calculate L using Equation (1),
∆= −
⎛
⎝
⎜
⎞
⎠
⎟
I
V
fL
V
V
L
OUT
O
OUT
CC
•
•1
Substituting V
OUT
= 1.875V, V
CC
= 4.2V, ΔI
L
= 240mA and
f
O
= 1.5MHz in Equation (3) gives:
L
V
MHz mA
V
V
=−
⎛
⎝
⎜
⎞
⎠
⎟
=
1 875
1 5 240
1
1 875
42
2
.
.•( )
•
.
.
..88µH
A 2.2µH inductor works well for this application. For best
effi ciency choose a 720mA or greater inductor with less
than 0.2Ω series resistance. C
IN
will require an RMS cur-
rent rating of at least 0.3A = I
LOAD(MAX)
/2 at temperature
and C
OUT
will require an ESR of less than 0.25Ω. In most
cases, a ceramic capacitor will satisfy this requirement.
Figure 7 shows the complete circuit along with its ef-
fi ciency curve.
Figure 5. DC-DC Converter Layout Diagram
Figure 6. DC-DC Converter Suggested Layout
6
7
8
10
9
3550-1 F05
+
–
L1
BOLD LINES INDICATE
HIGH CURRENT PATHS
LTC3550-1
V
OUT
V
CC
GND
SW
GND
V
CC
C
IN
V
OUT
C
OUT
17
+
–
V
CC
V
OUT
SW
L1
GND
C
IN
3550
-
1 F06
VIA TO V
CC
VIA TO V
OUT
C
OUT
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LTC3550EDHC-1#PBF

Mfr. #:
Buy LTC3550EDHC-1#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management Dual Input USB/AC Adapter Li-Ion Battery Charger w/ 600mA Buck Converter
Lifecycle:
New from this manufacturer.
Delivery:
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