General Description
The MAX1217 dual, monolithic, 12-bit, 125Msps analog-
to-digital converter (ADC) provides outstanding dynam-
ic performance up to a 250MHz input frequency. The
device operates with conversion rates up to 125Msps
while consuming only 650mW per channel.
At 125Msps and an input frequency of 200MHz, the
MAX1217 achieves an 80dBc spurious-free dynamic
range (SFDR) with excellent 65.3dB signal-to-noise ratio
(SNR) at 200MHz. The SNR remains flat (within 3dB) for
input tones up to 200MHz. This makes the MAX1217
ideal for wideband applications such as communications
receivers, cable head-end receivers, and power-amplifi-
er predistortion in cellular base-station transceivers.
The MAX1217 operates from a single 1.8V power sup-
ply. The analog inputs of each channel are designed
for AC-coupled, differential or single-ended operation.
The ADC also features a selectable on-chip divide-by-2
clock circuit that accepts clock frequencies as high as
250MHz and reduces the phase noise of the input
clock source. A low-voltage differential signal (LVDS)
sampling clock is recommended for best performance.
The converter’s digital outputs are LVDS compatible
and the data format can be selected to be either two’s
complement or offset binary.
The MAX1217 is available in a 100-pin TQFP package
with exposed paddle and is specified over the extend-
ed (-40°C to +85°C) temperature range. Refer to the
MAX1218 (170Msps) and the MAX1219 (210Msps)
data sheets for higher speed, pin-compatible devices.
Applications
Cable Modem Termination Systems (CMTS)
Cable Digital Return Path Transmitters
Cellular Base-Station Power-Amplifier Linearization
IF and Baseband Digitization
ATE and Instrumentation
Radar Systems
Features
125Msps Conversion Rate
Excellent Low-Noise Characteristics
SNR = 67dB at f
IN
= 100MHz
SNR = 65.3dB at f
IN
= 200MHz
Excellent Dynamic Range
SFDR = 85dBc at f
IN
= 100MHz
SFDR = 80dBc at f
IN
= 200MHz
Single 1.8V Supply
1.3W Power Dissipation at f
SAMPLE
= 125Msps
and f
IN
= 10MHz
On-Chip Track-and-Hold Amplifier
Internal 1.24V Bandgap Reference
On-Chip Selectable Divide-by-2 Clock Input
LVDS Digital Outputs with Data Clock Output
EV Kit Available (Order MAX1217EVKIT)
MAX1217
1.8V, Dual, 12-Bit, 125Msps ADC for
Broadband Applications
________________________________________________________________
Maxim Integrated Products
1
PART TEMP RANGE PIN-PACKAGE
PKG
CODE
MAX1217ECQ -40°C to +85°C 100 TQFP-EP* C100E-6
Pin-Compatible Versions
Ordering Information
PART
RESOLUTION
(BITS)
SPEED GRADE
(Msps)
MAX1219 12 210
MAX1218 12 170
MAX1217 12 125
19-3759; Rev 0; 8/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Pin Configuration appears at end of data sheet.
*
EP = Exposed paddle.
MAX1217
1.8V, Dual, 12-Bit, 125Msps ADC for
Broadband Applications
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(AV
CC
= OV
CC
= +1.8V, AGND = OGND = 0, f
SAMPLE
= 125MHz, differential input and differential sine-wave clock signal, 0.1µF
capacitors on REFA and REFB, internal reference, digital output differential R
L
= 100Ω, T
A
= -40°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AV
CC
to AGND ......................................................-0.3V to +2.1V
OV
CC
to OGND .....................................................-0.3V to +2.1V
OV
CC
to AV
CC
.......................................................-0.3V to +0.3V
OGND to AGND ....................................................-0.3V to +0.3V
CLKP, CLKN, INAP, INAN, INBP,
INBN to AGND .....................................-0.3V to (AV
CC
+ 0.3V)
CLKDIV, T/BA, T/BB to AGND .................-0.3V to (AV
CC
+ 0.3V)
REFA, REFADJA, REFB, REFADJB
to AGND...............................................-0.3V to (AV
CC
+ 0.3V)
DCOP, DCON, DA0P–DA11P, DA0N–DA11N,
DB0P–DB11P, DB0N–DB11N, ORAP, ORAN,
ORBP, ORBN to OGND.......................-0.3V to (OV
CC
+ 0.3V)
Current into any Pin.............................................................50mA
ESD Voltage on INAP, INAN, INBP, INBN
(Human Body Model).....................................................±750V
ESD Voltage on All Other Pins (Human Body Model)......±2000V
Continuous Power Dissipation (T
A
= +70°C)
100-Pin TQFP (derate 37mW/°C above +70°C).........2963mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DC ACCURACY
Resolution N 12 Bits
Integral Nonlinearity (Note 2) INL f
IN
= 10MHz -2 ±0.6 +2 LSB
Differential Nonlinearity (Note 2) DNL No missing codes -1 ±0.3 +1 LSB
Transfer Curve Offset V
OS
T
A
= +25°C (Note 2) -3 +3 mV
Offset Temperature Drift 10 µV/°C
ANALOG INPUTS (INAP, INAN, INBP, INBN)
Full-Scale Input Voltage Range V
FSR
T
A
= +25°C (Note 2) 1375 1475 1625 mV
P-P
Full-Scale Range Temperature
Drift
150 ppm/°C
Common-Mode Input Range V
CM
0.8 V
Differential Input Capacitance C
IN
3pF
Differential Input Resistance R
IN
1.8 kΩ
Full-Power Analog Bandwidth FPBW 800 MHz
REFERENCE (REFA, REFB, REFADJA, REFADJB)
Reference Output Voltage V
REF_
T
A
= +25°C, REFADJ_ = AGND 1.18 1.24 1.30 V
Reference Temperature Drift 65 ppm/°C
REFADJ_ Input High Voltage V
REFADJ_
Used to disable the internal reference
AV
CC
-
0.1
V
SAMPLING CHARACTERISTICS
Maximum Sampling Rate f
SAMPLE
125 MHz
Minimum Sampling Rate f
SAMPLE
40 MHz
MAX1217
1.8V, Dual, 12-Bit, 125Msps ADC for
Broadband Applications
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= OV
CC
= +1.8V, AGND = OGND = 0, f
SAMPLE
= 125MHz, differential input and differential sine-wave clock signal, 0.1µF
capacitors on REFA and REFB, internal reference, digital output differential R
L
= 100Ω, T
A
= -40°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Clock Pulse-Width Low t
CL
Figure 5 (Note 3) 2 20 ns
Clock Pulse-Width High t
CH
Figure 5 (Note 3) 2 20 ns
Clock Duty Cycle Set by clock-management circuit
40 to
60
%
Aperture Delay t
AD
Figures 5, 11 340 ps
Aperture Jitter t
AJ
Figure 11 0.15
ps
RMS
CLOCK INPUTS (CLKP, CLKN)
Differential Clock Input Amplitude (Note 3) 200 500 mV
P-P
Clock Input Common-Mode
Voltage
V
CLKCM
1.15
± 0.25
V
Clock Differential Input
Resistance
R
CLK
T
A
= +25°C (Note 3)
10
±25%
kΩ
Clock Differential Input
Capacitance
C
CLK
3pF
DYNAMIC CHARACTERISTICS (at -1dBFS) (Note 4)
f
IN
= 10MHz 65.2 67.7
f
IN
= 65MHz 65.2 67.5
f
IN
= 100MHz 67
Signal-to-Noise Ratio SNR
f
IN
= 200MHz 65.3
dB
f
IN
= 10MHz 10.5 11
f
IN
= 65MHz 10.5 10.9
f
IN
= 100MHz 10.8
Effective Number of Bits ENOB
f
IN
= 200MHz 10.6
Bits
f
IN
= 10MHz 65 67.6
f
IN
= 65MHz 65 67.4
f
IN
= 100MHz 66.8
Signal-to-Noise Plus Distortion SINAD
f
IN
= 200MHz 65.1
dB
f
IN
= 10MHz 72 88
f
IN
= 65MHz 72 86
f
IN
= 100MHz 85
Spurious-Free Dynamic Range SFDR
f
IN
= 200MHz 80
dBc
f
IN
= 10MHz -88 -72
f
IN
= 65MHz -86 -72
f
IN
= 100MHz -85
Worst Harmonic
(HD2 or HD3)
f
IN
= 200MHz -80
dBc
f
IN1
= 29MHz at -7dBFS
f
IN2
= 31MHz at -7dBFS
-92
Two-Tone Intermodulation
Distortion
TTIMD
f
IN1
= 97MHz at -7dBFS
f
IN2
= 100MHz at -7dBFS
-90
dBc

MAX1217ECQ+D

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC
Lifecycle:
New from this manufacturer.
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