MAX1217
1.8V, Dual, 12-Bit, 125Msps ADC for
Broadband Applications
16 ______________________________________________________________________________________
by output switching currents, which can couple into the
analog supply network. Isolate analog and output sup-
plies (AV
CC
and OV
CC
) where they enter the PC board
with separate networks of ferrite beads and capacitors to
their corresponding grounds (AGND, OGND).
To achieve optimum performance, provide each supply
with a separate network of 47µF tantalum capacitor and
parallel combination of 10µF and 1µF ceramic capaci-
tors. Additionally, the ADC requires each supply input
to be bypassed with a separate 0.1µF ceramic capaci-
tor (Figure 10). Locate these capacitors directly at the
ADC supply inputs or as close as possible to the
MAX1217. Choose surface-mount capacitors, whose
preferred location is on the same side as the converter
to save space and minimize inductance. If close place-
ment on the same side is not possible, route these
bypassing capacitors through vias to the bottom side of
the PC board.
Multilayer boards with separate ground and power
planes produce the highest level of signal integrity. Use
a split ground plane arranged to match the physical
location of the analog and output grounds on the ADC’s
package. Join the two ground planes at a single point
so the noisy output ground currents do not interfere
with the analog ground plane. Dynamic currents travel-
ing long distances before reaching ground cause large
and undesirable ground loops. Ground loops can
degrade the input noise by coupling back to the analog
front-end of the converter, resulting in increased spurious
activity, leading to decreased noise performance.
All AGND connections could share the same ground
plane, if the ground plane is sufficiently isolated from
any noisy, output systems ground. To minimize the cou-
pling of the output signals from the analog input, segre-
gate the output bus carefully from the analog input
circuitry. To further minimize the effects of output noise
coupling, position ground return vias throughout the lay-
out to divert output switching currents away from the
sensitive analog sections of the ADC. This approach
does not require split ground planes, but can be accom-
FS VOLTAGE vs. ADJUST RESISTOR
