MAX1217
1.8V, Dual, 12-Bit, 125Msps ADC for
Broadband Applications
8 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 REFA
Channel A Reference Input/Output. Channel A 1.24V reference output when REFADJA is driven
low. Channel A external reference input when REFADJA is driven high. Connect a 0.1µF capacitor
from REFA to AGND with both external and internal references.
2 REFADJA
Channel A Reference Adjust Input. REFADJA allows for full-scale range adjustments by placing a
resistor or trim potentiometer between REFADJA and AGND (decreases FS range) or REFADJA
and REFA (increases FS range). Connect REFADJA to AV
CC
to overdrive the internal reference
with an external reference. Connect REFADJA to AGND to allow the internal reference to
determine the full-scale range of the data converter. See the FSR Adjustments Using the Internal
Bandgap Reference section.
3, 5, 8, 11, 14, 18,
21, 23, 26, 28, 30,
33, 93, 96, 99, 100
AGND Analog Converter Ground
4, 9, 10, 15, 16,
17, 22, 27, 29, 31,
94, 95
AV
CC
Analog Supply Voltage. Bypass AV
CC
to AGND with a 0.1µF capacitor for best decoupling
results. Use additional board decoupling. See the Grounding, Bypassing, and Layout
Considerations section.
6 INAP Positive Analog Input A. Positive analog input to channel A.
7 INAN Negative Analog Input A. Negative analog input to channel A.
12 CLKP True Clock Input. Apply an LVDS-compatible input level to CLKP.
13 CLKN Complementary Clock Input. Apply an LVDS-compatible input level to CLKN.
19 INBN Negative Analog Input B. Negative analog input to channel B.
20 INBP Positive Analog Input B. Positive analog input to channel B.
24 REFADJB
Channel B Reference Adjust Input. REFADJB allows for full-scale range adjustments by placing a
resistor or trim potentiometer between REFADJB and AGND (decreases FS range) or REFADJB
and REFA (increases FS range). Connect REFADJB to AV
CC
to overdrive the internal reference
with an external reference. Connect REFADJB to AGND to allow the internal reference to
determine the full-scale range of the data converter. See the FSR Adjustments Using the Internal
Bandgap Reference section.
25 REFB
Channel B Reference Input/Output. Channel B 1.24V reference output when REFADJB is driven
low. Channel B external reference input when REFADJB is driven high. Connect a 0.1µF capacitor
from REFB to AGND with both external and internal references.
32 CLKDIV
Clock-Divider Input. CLKDIV controls the sampling frequency relative to the input clock
frequency. CLKDIV has an internal pulldown resistor.
CLKDIV = 0: Sampling frequency is one-half the input clock frequency.
CLKDIV = 1: Sampling frequency is equal to the input clock frequency.
34, 62, 92 OV
CC
Output Stage Supply Voltage. Bypass OV
CC
with a 0.1µF capacitor to AGND. Use additional
board decoupling. See the Grounding, Bypassing, and Layout Considerations section.
35 ORBP Channel B True Differential Over-Range Output
36 ORBN Channel B Complementary Differential Over-Range Output
37 DB11P Channel B True Differential Digital Output Bit 11 (MSB)
38 DB11N Channel B Complementary Differential Digital Output Bit 11 (MSB)
39 DB10P Channel B True Differential Digital Output Bit 10
40 DB10N Channel B Complementary Differential Digital Output Bit 10
41 DB9P Channel B True Differential Digital Output Bit 9
42 DB9N Channel B Complementary Differential Digital Output Bit 9
