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72V8985JG8

P1-P3P4-P6P7-P9P10-P12P13-P14
10
Commercial Temperature Range
IDT72V8985 3.3V Time Slot Interchange
Digital Switch 256 x 256
Figure 7. ST-BUS
®
Timing
F0i
C4i
TX
RX
5707 drw10
Ch. 31, Bit 0 Ch. 0, Bit 7 Ch. 0, Bit 6
Ch. 0, Bit 6Ch. 0, Bit 7Ch. 31, Bit 0
Ch. 0,
Bit 5
tF0iW
Ch. 0, Bit 5
tF0iH
tF0iS
tDAA
tC4i
tSTiS
tSTiH
tCH
tCL
tf
tr
AC ELECTRICAL CHARACTERISTICS
(1)
ST-BUS
®
TIMING
NOTE:
1. Timing is over recommended temperature and power supply voltages.
2. Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Symbol Parameter Min. Typ.
(2)
Max. Units Test Conditions
t
F0iW Frame Pulse Width 244 ns
t
F0iS Frame Pulse Setup Time 5 20 190 ns
t
F0iH Frame Pulse Hold Time 5 20 190 ns
t
DAA TX delay Active to Active 40 60 ns C
L
= 150pF
t
STiS RX Setup Time 10  ns
t
STiH RX Hold Time 10  ns
t
C4i Clock Period 244 ns
t
CL CK Input Low 122 ns
t
CH CK Input High 122 ns
tr, tf Clock Rise/Fall Time 10 ns
11
Commercial Temperature Range
IDT72V8985 3.3V Time Slot Interchange
Digital Switch 256 x 256
Figure 8. GCI Timing
tDAA
TX
RX
5707 drw11
tSTiS
tSTiH
tWFH
F0i
C4i
tCH
tCL
tf
tr
tC4i
Ch. 31 Bit 7 Ch. 0
Bit 0 Ch. 0 Bit 1
Ch. 0 Ch. 0 Bit 1Bit 0Ch. 31 Bit 7
tF0iS
tF0iH
AC ELECTRICAL CHARACTERISTICS
(1)
GCI TIMING
NOTE:
1. Timing is over recommended temperature and power supply voltages.
2. Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Symbol Parameter Min. Typ.
(2)
Max. Units Test Conditions
t
C4i Clock Period 244 ns
tCL, tCH Pulse Width 122 ns
t
WFH Frame Width High 244 ns
t
F0iS Frame Setup 5 20 190 ns
t
F0iH Frame Hold 5 20 190 ns
t
DAA Data Delay/Clock Active to Active 40 60 ns C
L
= 150pF
t
STiS RX Input Setup 10  ns
t
STiH RX Input Hold 10  ns
tr, tf Clock Rise/Fall Time 10 ns
12
Commercial Temperature Range
IDT72V8985 3.3V Time Slot Interchange
Digital Switch 256 x 256
C4i
TX0-7
CCO
5707 drw12
TX0-7
(GCI)
(ST-BUS
)
Bit Cell Boundary
tTAZ
tXCD
tTZA
Figure 9. Serial Outputs and External Control
Figure 10. Output Driver Enable
tOED
ODE
TX0-7
5707 drw13
tOED
Figure 11. Reset
RS
TX
5707 drw14
t
ZDO
t
ZRS
t
RSZ
t
RPW
AC ELECTRICAL CHARACTERISTICS
(1)
SERIAL STREAM TIMING
Symbol Characteristics Min. Typ.
(2)
Max. Unit Test Conditions
t
TAZ TX0-7 Delay - Active to High Z 30 45 ns R
L
= 1KΩ
(3)
, C
L
= 150pF
t
TZA TX0-7 Delay - High Z to Active 45 60 ns C
L
= 150pF
t
OED Output Driver Enable Delay 45 60 ns R
L
= 1KΩ
(3)
, C
L
= 150pF
t
XCD CCO Output Delay 0 40 60 ns C
L
= 150pF
t
RSZ Reset to High Z 5 30 ns
t
ZRS High Z to Reset 0  ns
t
ZDO High Z to Valid Data 32 cycles C4i cycles
t
RPW Reset Pulse Width 100  ns R
L
= 1KΩ
(3)
, C
L
= 150pF
NOTE:
1. Timing is over recommended temperature and power supply voltages.
2. Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
3. High Impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel time taken to discharge C
L
.
P1-P3P4-P6P7-P9P10-P12P13-P14

72V8985JG8

Mfr. #:
Buy 72V8985JG8
Manufacturer:
IDT
Description:
Digital Bus Switch ICs 3.3V 256 X 256 TSI SWITCH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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