13
Commercial Temperature Range
IDT72V8985 3.3V Time Slot Interchange
Digital Switch 256 x 256
Figure 12. Motorola Non-Multiplexed Bus Timing
CS
DS
D0-D7
WRITE
5707 drw15
R/W
A0-A5
D0-D7
READ
DTA
VALID DATA
VALID DATA
t
CSS
t
RWS
t
ADS
t
CSH
t
RWH
t
ADH
t
DHR
t
DSW
t
SWD
t
DDR
t
AKD
t
DHW
t
AKH
AC ELECTRICAL CHARACTERISTICS
(1)
MICROPROCESSOR TIMING
Symbol Characteristics Min. Typ.
(2)
Max. Unit Test Conditions
t
CSS CS Setup from DS Rising 0 ns
t
RWS R/W Setup from DS Rising 5 ns
t
ADS Add Setup from DS Rising 5 ns
t
CSH CS Hold after DS Falling 0 ns
t
RWH R/W Hold after DS Falling 5 ns
t
ADH Add Hold after DS Falling 5 ns
t
DDR Data Setup from DTA Low on Read 10 ns C
L
= 150pF
t
DHR Data Hold on Read 10 50 90 ns R
L
= 1KΩ
(3)
, C
L
= 150pF
t
DSW Data Setup on Write (Fast Write) 10 ns
t
SWD Valid Data Delay on Write (Slow Write) 122 ns
t
DHW Data Hold on Write 5 ns
t
AKD Acknowledgment Delay: C
L
= 150pF
Reading Data Memory 560 1220 ns
Reading/Writing Connection Memory 300/370 730/800 ns
Writing to Control Register 45 70 ns
Reading to Control Register 45 70 ns
t
AKH Acknowledgment Hold Time 10 20 40 ns R
L
= 1KΩ
(3)
, C
L
= 150pF
NOTE:
1. Timing is over recommended temperature and power supply voltages.
2. Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
3. High Impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel time taken to discharge C
L
.
