6.42
7
IDT71P74804 (1M x 18-Bit) 71P74604 (512K x 36-Bit)
Advance Information
18 Mb QDR II SRAM Burst of 4 Commercial Temperature Range
IDT71P74804 (1M x 18-Bit) 71P74604 (512K x 36-Bit)
18 Mb QDR II SRAM Burst of 4 Commercial Temperature Range
Absolute Maximum Ratings
(1) (2)
Capacitance (TA = +25°C, f = 1.0MHz)
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VDDQ must not exceed VDD during normal operation.
NOTE:
1. Tested at characterization and retested after any design or process
change that may affect these parameters.
Symbol Parameter Conditions Max. Unit
C
IN
Input Capacitance
V
DD
= 1.8V
V
DDQ
= 1.5V
5pF
C
CLK
Clock Input Capacitance 6 pF
C
O
Output Capacitance 7 pF
6111 tbl 06
Symbol Rating Value Unit
V
TE R M
Supply Voltage on V
DD
with
Respect to GND
0.5 to +2.9 V
V
TE R M
Supply Voltage on V
DDQ
with
Respect to GND
–0.5 to V
DD
+0.3 V
V
TE R M
Voltage on Input terminals with
respect to GND
–0.5 to V
DD
+0.3 V
V
TE R M
Voltage on Output and I/O
terminals with respect to GND.
–0.5 to V
DDQ
+0.3 V
T
BIAS
Temperature Under Bias 55 to +125 °C
T
STG
Storage Temperature 65 to +150 °C
I
OUT
Continuous Current into Outputs + 20 mA
6111 tbl 05
Recommended DC Operating and
Temperture Conditions
Symbol Parameter Min. Typ. Max. Unit
V
DD
Power Supply
Voltage
1.7 1.8 1.9 V
V
DDQ
I/O Supply Voltage 1.4 1.5 1.9 V
V
SS
Ground 0 0 0 V
V
REF
Input Reference
Voltage
0.68 V
DDQ
/2 0.95 V
T
A
Ambient
Temperature
(1)
025+70
o
c
6111 tbl 04
NOTES:
1) All byte write (BWx) signals are sampled on
the rising edge of K and again on K. The data that is present on the
data bus in the designated byte will be latched into the input if
the corresponding BWxis held low. The rising edge of K
will sample the first and third bytes of the four word burst and
the rising edge of K will sample the second and fourth bytes
of the four word burst.
2) The availability of the BWx on designated devices is de
scribed in the pin description table.
3) The QDRII Burst of four SRAM has data forwarding. A read request
that is initiated on the cycle following a write request to the same
address will produce the newly written data in response to the read
request.
Signal
BW
0
BW
1
BW
2
BW
3
Write Byte 0 LXXX
Write Byte 1 X L X X
Write Byte 2 X X L X
Write Byte 3 X X X L
6111 tbl 09
Write Descriptions
(1,2)
NOTE:
1. During production testing, the case temperarure equals the ambient
temperature.
6.428
IDT71P74804 (1M x 18-Bit) 71P74604 (512K x 36-Bit)
18 Mb QDR II SRAM Burst of 4 Commercial Temperature Range
Application Example
6.42
9
IDT71P74804 (1M x 18-Bit) 71P74604 (512K x 36-Bit)
Advance Information
18 Mb QDR II SRAM Burst of 4 Commercial Temperature Range
IDT71P74804 (1M x 18-Bit) 71P74604 (512K x 36-Bit)
18 Mb QDR II SRAM Burst of 4 Commercial Temperature Range
DC Electrical Characteristics Over the Operating Temperature and
Supply Voltage Range
(VDD = 1.8 ± 100mV, VDDQ = 1.4V to 1.9V)
Parameter Symbol Test Conditions Min Max Unit Note
Input Leakage Current I
IL
V
DD
= Max V
IN
= V
SS
to V
DDQ
-2 +2
µA
Output Leakage Current
I
OL
Output Disabled -2 +2 µA
Operating Current
(x36): DDR
I
DD
V
DD
= Max,
I
OUT
= 0mA (outputs open),
Cycle Time >
t
KHKH
Min
250MH
Z
- 1100
mA 1200MHz - 950
167MHz - 850
Operating Current
(x18): DDR
I
DD
V
DD
= Max,
I
OUT
= 0mA (outputs open),
Cycle Time >
t
KHKH
Min
250MH
Z
- 850
mA 1200MHz - 750
167MHz - 650
Standby Current: NOP I
SB1
Device Deselected (in NOP state)
I
OUT
= 0mA (outputs open),
f=Max,
All Inputs <
0.2V or > VDD -0.2V
250MH
Z
- 375
mA 2200MHz - 335
167MHz - 300
Output High Voltage
V
OH1
RQ = 250Ω, I
OH
= -15mA V
DDQ
/2-0.12 V
DDQ
/2+0.12 V 3,7
Output Low Voltage
V
OL1
RQ = 250Ω, I
OL
= 15mA V
DDQ
/2-0.12 V
DDQ
/2+0.12 V 4,7
Output High Voltage
V
OH2
I
OH
= -0.1mA V
DDQ
-0.2 V
DDQ
V5
Output Low Voltage
V
OL2
I
OL
= 0.1mA V
SS
0.2 V 6
6111 tbl 10c
NOTES:
1. Operating Current is measured at 100% bus utilization.
2. Standby Current is only after all pending read and write burst operations are completed.
3. Outputs are impedance-controlled. IOH = -(VDDQ/2)/(RQ/5) and is guaranteed by device characterization for 175 < RQ < 350Ω. This
parameter is tested at RQ = 250Ω, which gives a nominal 50output impedance.
4. Outputs are impedance-controlled. IOL = (VDDQ/2)/(RQ/5) and is guaranteed by device characterization for 175 < RQ < 350Ω. This
parameter is tested at RQ = 250Ω, which gives a nominal 50output impedance.
5. This measurement is taken to ensure that the output has the capability of pulling to the VDDQ rail, and is not intended to be used as an
impedance measurement point.
6. This measurement is taken to ensure that the output has the capability of pulling to Vss, and is not intended to be used as an impedance
measurement point.
7. Programmable Impedance Mode.

IDT71P74604S250BQ8

Mfr. #:
Manufacturer:
Description:
IC SRAM 18M PARALLEL 165CABGA
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New from this manufacturer.
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