LTC3728L/LTC3728LX
29
3728lxff
applicaTions inForMaTion
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 10. Figure 11 illustrates the cur-
rent waveforms present in the various branches of the
2-phase synchronous regulators operating in the continu-
ous mode. Check the following in your layout:
1. Are the top N-channel MOSFETs M1 and M3 located with-
in 1cm of each other with a common drain connection
at C
IN
? Do not attempt to split the input decoupling for
the two channels as it can cause a large resonant loop.
2. Are the signal and power grounds kept separate? The
combined IC signal ground pin and the ground return
of C
INTVCC
must return to the combined C
OUT
(–) termi-
nals. The path formed by the top N-channel MOSFET,
Schottky diode and the C
IN
capacitor should have short
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing
the capacitors next to each other and away from the
Schottky loop just described.
3. Do the LTC3728L/LTC3728LX V
OSENSE
pins’ resistive
dividers connect to the (+) terminals of C
OUT
? The resis-
tive divider must be connected between the (+) terminal
of C
OUT
and signal ground. The R2 and R4 connections
should not be along the high current input feeds from
the input capacitor(s).
4. Are the SENSE
–
and SENSE
+
leads routed together
with minimum PC trace spacing? The filter capacitor
between SENSE
+
and SENSE
–
should be as close as
possible to the IC. Ensure accurate current sensing
with Kelvin connections at the SENSE resistor.
5. Is the INTV
CC
decoupling capacitor connected close to
the IC, between
the INTV
CC
and the power ground pins?
This capacitor carries the MOSFET drivers current peaks.
An additional 1µF ceramic capacitor placed immediately
next to the INTV
CC
and PGND pins can help improve
noise performance substantially.
6. Keep the switching nodes (SW1, SW2), top gate nodes
(TG1, TG2), and boost nodes (BOOST1, BOOST2) away
from sensitive small-signal nodes, especially from the
opposites channel’s voltage and current sensing feed-
back pins. All of these nodes have very large and fast
moving signals and therefore should be kept on the
output side of the LTC3728L/LTC3728LX and occupy
minimum PC trace area.
7. Use a modified “star ground” technique: a low imped-
ance, large copper area central grounding point on
the same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTV
CC
decoupling capacitor, the bottom of the voltage feedback
resistive divider and the SGND pin of the IC.
