LTC3728L/LTC3728LX
32
3728lxff
applicaTions inForMaTion
PC Board Layout Debugging
Start with one controller on at a time. It is helpful to use
a DC-50MHz current probe to monitor the current in the
inductor while testing the circuit. Monitor the output switch-
ing node (SW pin) to synchronize the oscilloscope to the
internal oscillator and probe the actual output voltage as
well. Check for proper performance over the operating
voltage and current range expected in the application. The
frequency of operation should be maintained over the input
voltage range down to dropout and until the output load
drops below the low current operation threshold—typically
10% to 20% of the maximum designed current level in
Burst Mode operation.
The duty cycle percentage should be maintained from cycle
to cycle in a well designed, low noise PCB implementation.
Variation in the duty cycle at a subharmonic rate can sug-
gest noise pickup at the current or voltage sensing inputs
or inadequate loop compensation. Overcompensation of
the loop can be used to tame a poor PC layout if regulator
bandwidth optimization is not required. Only after each
controller is checked for its individual performance should
both controllers be turned on at the same time. A particularly
difficult region of operation is when one controller channel
is nearing its current comparator trip point when the other
channel is turning on its top MOSFET. This occurs around
50% duty cycle on either channel due to the phasing of
the internal clocks and may cause minor duty cycle jitter.
Short-circuit testing can be performed to verify proper
overcurrent latchoff, or 5µA can be provided to the RUN/
SS pin(s) by resistors from V
IN
to prevent the short-circuit
latchoff from occurring.
Reduce V
IN
from its nominal level to verify operation of
the regulator in dropout. Check the operation of the un-
dervoltage lockout circuit by further lowering V
IN
while
monitoring the outputs to verify operation.
Investigate whether any problems exist only at higher out-
put currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG,
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
high current output loading at lower input voltages, look
for inductive coupling between C
IN
, Schottky and the top
MOSFET components to the sensitive current and voltage
sensing traces. In addition, investigate common ground
path voltage pickup between these components and the
SGND pin of the IC.
An embarrassing problem, which can be missed in an
otherwise properly working switching regulator, results
when the current sensing leads are hooked up backwards.
The output voltage under this improper hookup will still
be maintained but the advantages of current mode control
will not be realized. Compensation of the voltage loop will
be much more sensitive to component selection. This
behavior can be investigated by temporarily shorting out
the current sensing resistor—don’t worry, the regulator
will still maintain control of the output voltage.
