44
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72T4088/98/108/118 2.5V HIGH-SPEED TeraSync™ DDR/SDR FIFO 40-BIT
CONFIGURATION 16,384 x 40, 32,768 x 40, 65,536 x 40 and 131,072 x 40
FEBRUARY 13, 2009
Figure 23 . Retransmit from MARK in Double Data Rate Mode (IDT Standard Mode)
NOTES:
1. Retransmit setup is complete when EF returns HIGH.
2. OE = LOW;RCS = LOW.
3. RT must be HIGH when reading from FIFO.
4. Once MARK is set, the write pointer will not increment past the ‘marked’ location, preventing overwrites of Retransmit data.
5. Before a “MARK” can be set there must be at least 160 bytes of data between the Write Pointer and Read Pointer locations. (160 bytes = 16 words = 8 long words).
6. RCLK must be free running for EF to update.
7. A transition in the PAE flag may not occur until one RCLK cycle later than shown.
8. In DDR mode the MARK function will “MARK” words only on even word boundaries (i.e. Rising edge of RCLK).
Q
0-
Qn
WCLK
RCLK
REN
PAF
t
CLKL2
t
CLKH2
t
CLK2
t
A
W
MK
MARK
t
A
t
A
t
A
W
MK+2
t
A
t
A
W
MK+3
W
MK+4
W
MK+5
W
MK+6
W
MK+n
RT
EF
PAE
t
ENS
t
ENH
t
REF
t
REF
t
ENS
1
2
t
A
t
PAES
(7)
t
A
t
A
t
A
W
MK
W
MK+1
W
MK+2
t
SKEW2
1
2
t
PAFS
5995 drw26
t
ENH
t
ENS
t
ENS
W
MK+1
