48
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72T4088/98/108/118 2.5V HIGH-SPEED TeraSync™ DDR/SDR FIFO 40-BIT
CONFIGURATION 16,384 x 40, 32,768 x 40, 65,536 x 40 and 131,072 x 40
FEBRUARY 13, 2009
Figure 28. Echo RCLK and Echo
RENREN
RENREN
REN
Operation (FWFT Mode Only)
NOTE:
1. The O/P Register is the internal output register. Its contents are available on the Qn output bus only when RCS and OE are both active, LOW, that is the bus is not in High-
Impedance state.
2. OE is LOW.
Cycle:
a&b. At this point the FIFO is empty, OR is HIGH.
RCS and REN are both disabled, the output bus is High-Impedance.
c. Word Wn+1 falls through to the output register, OR goes active, LOW.
RCS is HIGH, therefore the Qn outputs are High-Impedance. EREN goes LOW to indicate that a new word has been placed on the output register.
d. EREN goes HIGH, no new word has been placed on the output register on this cycle.
e. No Operation.
f. RCS is LOW on this cycle, therefore the Qn outputs go to Low-Impedance and the contents of the output register (Wn+1) are made available.
NOTE: In FWFT mode is important to take RCS active LOW at least one cycle ahead of REN, this ensures the word (Wn+1) currently in the output register is made
available for at least one cycle.
g. REN goes active LOW, this reads out the second word, Wn+2.
EREN goes active LOW to indicate a new word has been placed into the output register.
h. Word Wn+3 is read out, EREN remains active, LOW indicating a new word has been read out.
NOTE: Wn+3 is the last word in the FIFO.
i. This is the next enabled read after the last word, Wn+3 has been read out. OR flag goes HIGH and EREN goes HIGH to indicate that there is no new word available.
3. OE is LOW.
4. The truth table for EREN is shown below:
Qn
O/P
Reg.
t
A
t
REF
OR
5995 drw31
t
RCSLZ
REN
t
ENS
t
ENH
RCS
t
ENS
RCLK
a
b
c
d
e
f
g
h
i
W
n+1
WCLK
WEN
D0 - Dn
t
SKEW1
t
ENS
t
DS
t
ENH
W
n+2
W
n+3
ERCLK
EREN
t
CLKEN
t
CLKEN
t
CLKEN
t
CLKEN
W
n+1
W
n+2
W
n+3
t
A
t
REF
W
n+1
W
n+2
W
n+3
t
A
W
n
Last Word
t
A
t
A
t
DH
t
DH
t
DH
t
DS
t
DS
1
2
t
ERCLK
HIGH-Z
RCLK OR RCS REN EREN
↑ 0000
↑ 0011
↑ 0101
↑ 0111
↑ 1XX1
