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LTC2946CMS#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42
LTC2946
25
2946fa
For more information www.linear.com/LTC2946
APPLICATIONS INFORMATION
Table 1. LTC2946 Device Addressing
DESCRIPTION
HEX DEVICE
ADDRESS BINARY DEVICE ADDRESS
LTC2946
ADDRESS PINS
h a6 a5 a4 a3 a2 a1 a0 R/W ADR1 ADR0
Mass Write CC 1 1 0 0 1 1 0 0 X X
Alert Response 19 0 0 0 1 1 0 0 1 X X
0 CE 1 1 0 0 1 1 1 X H L
1 D0 1 1 0 1 0 0 0 X NC H
2 D2 1 1 0 1 0 0 1 X H H
3 D4 1 1 0 1 0 1 0 X NC NC
4 D6 1 1 0 1 0 1 1 X NC L
5 D8 1 1 0 1 1 0 0 X L H
6 DA 1 1 0 1 1 0 1 X H NC
7 DC 1 1 0 1 1 1 0 X L NC
8 DE 1 1 0 1 1 1 1 X L L
Table 2. LTC2946 Register Addresses and Contents
REGISTER ADDR REGISTER NAME READ/WRITE DESCRIPTION DEFAULT
00h CTRLA R/W Operation Control Register A 18h
01h CTRLB R/W Operation Control Register B 00h
02h ALERT1 R/W Selects Which Primary Faults Generate Alerts 00h
03h STATUS1 R Primary Status Information 00h
04h FAULT1 R/W Primary Fault Log 00h
05h POWER MSB2 R/W Power MSB2 Data XXh
06h POWER MSB1 R/W Power MSB1 Data XXh
07h POWER LSB R/W Power LSB Data XXh
08h MAX POWER MSB2 R/W Maximum Power MSB2 Data 00h
09h MAX POWER MSB1 R/W Maximum Power MSB1 Data 00h
0Ah MAX POWER LSB R/W Maximum Power LSB Data 00h
0Bh MIN POWER MSB2 R/W Minimum Power MSB2 Data FFh
0Ch MIN POWER MSB1 R/W Minimum Power MSB1 Data FFh
0Dh MIN POWER LSB R/W Minimum Power LSB Data FFh
0Eh MAX POWER THRESHOLD MSB2 R/W Maximum POWER Threshold MSB2 to Generate Alert FFh
0Fh MAX POWER THRESHOLD MSB1 R/W Maximum POWER Threshold MSB1 to Generate Alert FFh
10h MAX POWER THRESHOLD LSB R/W Maximum POWER Threshold LSB to Generate Alert FFh
11h MIN POWER THRESHOLD MSB2 R/W Minimum POWER Threshold MSB2 to Generate Alert 00h
12h MIN POWER THRESHOLD MSB1 R/W Minimum POWER Threshold MSB1 to Generate Alert 00h
13h MIN
POWER THRESHOLD LSB R/W
Minimum POWER Threshold LSB to Generate Alert 00h
14h ΔSENSE MSB R/W ΔSENSE MSB Data XXh
15h ΔSENSE LSB R/W ΔSENSE LSB Data X0h
16h MAX ΔSENSE MSB R/W Maximum ΔSENSE MSB Data 00h
17h MAX ΔSENSE LSB R/W Maximum ΔSENSE LSB Data 00h
18h MIN ΔSENSE MSB R/W Minimum ΔSENSE MSB Data FFh
19h MIN ΔSENSE LSB R/W Minimum ΔSENSE LSB Data F0h
1Ah MAX ΔSENSE THRESHOLD MSB R/W Maximum ΔSENSE Threshold MSB to Generate Alert FFh
LTC2946
26
2946fa
For more information www.linear.com/LTC2946
APPLICATIONS INFORMATION
1Bh MAX ΔSENSE THRESHOLD LSB R/W Maximum ΔSENSE Threshold LSB to Generate Alert F0h
1Ch MIN ΔSENSE THRESHOLD MSB R/W Minimum ΔSENSE Threshold MSB to Generate Alert 00h
1Dh MIN ΔSENSE THRESHOLD LSB R/W Minimum ΔSENSE Threshold LSB to Generate Alert 00h
1Eh V
IN
MSB R/W ADC V
IN
MSB Data XXh
1Fh V
IN
LSB R/W ADC V
IN
LSB Data X0h
20h MAX V
IN
MSB R/W Maximum V
IN
MSB Data 00h
21h MAX V
IN
LSB R/W Maximum V
IN
LSB Data 00h
22h MIN V
IN
MSB R/W Minimum V
IN
MSB Data FFh
23h MIN V
IN
LSB R/W Minimum V
IN
LSB Data F0h
24h MAX V
IN
THRESHOLD MSB R/W Maximum V
IN
Threshold MSB to Generate Alert FFh
25h MAX V
IN
THRESHOLD LSB R/W Maximum V
IN
Threshold LSB to Generate Alert F0h
26h MIN V
IN
THRESHOLD MSB R/W Minimum V
IN
Threshold MSB to Generate Alert 00h
27h MIN V
IN
THRESHOLD LSB R/W Minimum V
IN
Threshold LSB to Generate Alert 00h
28h ADIN MSB R/W ADIN MSB Data XXh
29h ADIN LSB R/W ADIN LSB Data X0h
2Ah MAX ADIN MSB R/W Maximum ADIN MSB Data 00h
2Bh MAX ADIN LSB R/W Maximum ADIN LSB Data 00h
2Ch MIN ADIN MSB R/W Minimum
ADIN MSB Data FFh
2Dh
MIN ADIN LSB R/W Minimum ADIN LSB Data F0h
2Eh MAX ADIN THRESHOLD MSB R/W Maximum ADIN Threshold MSB to Generate Alert FFh
2Fh MAX ADIN THRESHOLD LSB R/W Maximum ADIN Threshold LSB to Generate Alert F0h
30h MIN ADIN THRESHOLD MSB R/W Minimum ADIN Threshold MSB to Generate Alert 00h
31h MIN ADIN THRESHOLD LSB R/W Minimum ADIN Threshold LSB to Generate Alert 00h
32h ALERT2 R/W Selects Which Secondary Faults Generate Alerts 00h
33h GPIO_CFG R/W GPIO Configuration 00h
34h TIME COUNTER MSB3 R/W Time Counter MSB Data3 XXh
35h TIME COUNTER MSB2 R/W Time Counter MSB Data2 XXh
36h TIME COUNTER MSB1 R/W Time Counter MSB Data1 XXh
37h TIME COUNTER LSB R/W Time Counter LSB Data XXh
38h CHARGE MSB3 R/W Charge MSB Data3 XXh
39h CHARGE MSB2 R/W Charge MSB Data2 XXh
3Ah CHARGE MSB1 R/W Charge MSB Data1 XXh
3Bh CHARGE LSB R/W Charge LSB Data XXh
3Ch ENERGY MSB3 R/W Energy MSB Data3 XXh
3Dh ENERGY MSB2 R/W Energy MSB Data2 XXh
3Eh ENERGY MSB1 R/W Energy MSB Data1 XXh
3Fh ENERGY LSB R/W Energy LSB Data XXh
40h STATUS2 R Secondary Status Information 00h
41h FAULT2 R/W Secondary Fault Log 00h
42h
GPIO3_CTRL R/W
GPIO3 Control Command 00h
43h CLK_DIV R/W Clock Divider Command 04h
E7h MFR_SPECIAL_ ID MSB R Manufacturer Special ID MSB Data 60h
E8h MFR_SPECIAL_ID LSB R Manufacturer Special ID LSB Data 01h
LTC2946
27
2946fa
For more information www.linear.com/LTC2946
APPLICATIONS INFORMATION
Table 3. CTRLA Register (00h): Read/Write
BIT REGISTER NAME OPERATION DEFAULT
CA[7] ADIN Configuration [1] = ADIN Measured with Respect to INTV
CC
[0] = ADIN Measured with Respect to GND
0
CA[6:5] Offset Calibration
Configuration
Offset Calibration
[11] = 1st Power-Up or Use Last Calibrated Result
[10] = Once Every 128 Conversions
[01] = Once Every 16 Conversions
[00] = Every Conversion
00
CA[4 :3] Voltage Selection [11] = SENSE
+
[10] = ADIN
[01] = V
DD
[00] = ΔSENSE**
11
CA[2 :0] Channel
Configuration
[111] = Snapshot Mode (Channel Defined by CA[4:3]). No Power, Energy or Charge Data Generated
[110] = Voltage Measurement Once Followed by Current Measurement Indefinitely*
[101] = ADIN, Voltage, Current Measurement at 1/256, 1/256 and 254/256 Duty Cycle, Respectively*
[100] = ADIN, Voltage, Current Measurement at 1/32, 1/32 and 30/32 Duty Cycle, Respectively*
[011] = Alternate ADIN, Voltage and Current Measurement*
[010] = Voltage, Current Measurement at 1/128 and 127/128 Duty Cycle, Respectively*
[001] = Voltage, Current Measurement at 1/16 and 15/16 Duty Cycle, Respectively*
[000] = Alternate Voltage, Current Measurement*
000
*Voltage defined by CA[4:3] in polling modes.
**If ΔSENSE (00) is selected and the channel configuration is other than snapshot mode (111) the voltage data is always the value in the V
IN
register
prior to the mode change. It is recommended that ΔSENSE be avoided when polling modes are used.
Table 4. CTRLB Register (01h): Read/Write
BIT REGISTER NAME OPERATION DEFAULT
CB[7] ALERT Clear Enable Clear ALERT if Device is Addressed by the Master
[1] = Enable
[0] = Disable
0
CB[6] Shutdown [1] = Shutdown
[0] = Power-Up
0
CB[5] Cleared on Read Control FAULT Registers Cleared on Read
[1] = Cleared on Read
[0] = Registers Not Affected by Reading
0
CB[4] Stuck Bus Timeout Auto Wake-Up Allows Part to Exit Shutdown Mode When Stuck-Bus Timer Is Reached
[1] = Enable
[0] = Disable
0
CB[3:2] Enable Accumulation [11] = Reserved
[10] = Follows ACC State (GPIO2, See Table 9)
ACC High, Accumulate
ACC Low, No Accumulate
[01] = No Accumulate
[00] = Accumulate
00
CB[1:0] Auto-Reset Mode/Reset [11] = Reset All Registers
[10] = Reset Accumulator (Time Counter, Charge and Energy) Registers
[01] = Enable Auto-Reset
[00] = Disable Auto-Reset
00
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42

LTC2946CMS#TRPBF

Mfr. #:
Buy LTC2946CMS#TRPBF
Manufacturer:
Analog Devices Inc.
Description:
Current Sense Amplifiers Wide Rng I2C Pwr, Ch & Energy Mon
Lifecycle:
New from this manufacturer.
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