ZL30110 Data Sheet
18
Zarlink Semiconductor Inc.
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
Figure 9 - Asynchronous Clocks Input to Output Timing
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
** Buffered OSCi clock input, characterization data did not account for input clock duty cycle nor rise/fall time degradation.
7.2 Performance Characteristics
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
AC Electrical Characteristics* - Input to output timing for Asynchronous clocks (see Figure 9).
Characteristics Symbol Min. Max. Units Notes
1
25 MHz master clock input to C25a/b/c/d/e/fo
delay
t
M_C25D
314ns
AC Electrical Characteristics* - Output timing for Asynchronous clocks (see Figure 9).
Characteristics Symbol Min. Max. Units Notes
1 C25a/b/c/d/e/fo pulse width low** t
C25L
18 22 ns 30 pF output load
2 C125o pulse width low t
C125L
3.2 4.6 ns 25 pF output load
3 C100o pulse width low t
C100L
4.1 5.6 ns 30 pF output load
4 C66o pulse width low t
C66L
6.8 8.0 ns 30 pF output load
Performance Characteristics* - Functional
Characteristics Min. Typ. Max. Units Notes
1
DPLL capture range -130 +130 ppm The 25 MHz Master Clock
oscillator set at 0.ppm
Lock Time
2 DPLL 58 Hz Filter 1 s input reference = 8 kHz,
±100 ppm frequency
offset
3 DPLL 922 Hz Filter 1 s input reference ≠ 8kHz,
±100 ppm frequency
offset
4 APLL 450 kHz Filter 150 μs
Master Clock
t
M_C25D
Asynchronous
Output Clocks
25MHz
