LTC3776EUF#TRPBF Datasheet LTC3776EGN#TRPBF, LTC3776EUF#TRPBF, LTC3776EUF#PBF | P10-P12

LTC3776

3776fa

OPERATIO

Short-Circuit Protection

When an output is shorted to ground, the switching

frequency of that controller is reduced to 1/5 of the normal

operating frequency.

The short-circuit threshold on V

FB2

is based on the smaller

of 0.12V and a fraction of the voltage on the V

REF

pin. This

also allows V

OUT2

to start up and track V

OUT1

more easily.

Note that if V

OUT1

is truly short-circuited (V

OUT1

= V

FB1

0V), then the LTC3776 will try to regulate V

OUT2

to 0V if

OUT1

is connected to the V

REF

pin.

Output Overvoltage Protection

As further protection, the overvoltage comparator (OV)

guards against transient overshoots, as well as other more

serious conditions that may overvoltage the output. When

the feedback voltage on the V

pin has risen 13.33%

above its resolution point, the external P-channel MOSFET

is turned off and the N-channel MOSFET is turned on until

the overvoltage is cleared.

Frequency Selection and Phase-Locked Loop

(PLLLPF and SYNC/SSEN Pins)

The selection of switching frequency is a tradeoff between

efficiency and component size. Low frequency operation

increases efficiency by reducing MOSFET switching losses,

but requires larger inductance and/or capacitance to main-

tain low output ripple voltage.

The switching frequency of the LTC3776’s controllers can

be selected using the PLLLPF pin.

If the SYNC/SSEN pin is tied to ground, the PLLLPF pin can be

floated, tied to V

, or tied to SGND to select 550kHz, 750kHz,

or 300kHz constant frequency operation, respectively.

A phase-locked loop (PLL) is available on the LTC3776 to

synchronize the internal oscillator to an external clock

source that connected to the SYNC/SSEN pin. In this case,

a series RC should be connected between the PLLLPF pin

and SGND to serve as the PLL’s loop filter. The LTC3776

(Refer to Functional Diagram)

When the load current increases, it causes a slight

decrease in V

relative to the reference, which in turn

causes the I

voltage to increase until the average induc-

tor current matches the new load current. While the top

P-channel MOSFET is off, the bottom N-channel MOSFET

is turned on until the beginning of the next cycle.

Shutdown, Soft-Start and Tracking Start-Up

(RUN/SS and TRACK Pins)

The LTC3776 is shut down by pulling the RUN/SS pin low.

In shutdown, all controller functions are disabled and the

chip draws only 9μA. The TG outputs are held high (off)

and the BG outputs low (off) in shutdown. Releasing

RUN/SS allows an internal 0.7μA current source to charge

up the RUN/SS pin. When the RUN/SS pin reaches 0.65V,

the LTC3776’s two controllers are enabled.

The start-up of V

OUT1

is controlled by the LTC3776’s

internal soft-start. During soft-start, the error amplifier

EAMP compares the feedback signal V

FB1

to the internal

soft-start ramp (instead of the 0.6V reference), which rises

linearly from 0V to 0.6V in about 1ms. This allows the

output voltage to rise smoothly from 0V to its final value,

while maintaining control of the inductor current.

The 1ms soft-start time can be increased by connecting

the optional external soft-start capacitor C

between the

RUN/SS and SGND pins. As the RUN/SS pin continues to

rise linearly from approximately 0.65V to 1.25V (being

charged by the internal 0.7μA current source), the EAMP

regulates the V

FB1

proportionally linearly from 0V to 0.6V.

The start-up of V

OUT2

is controlled by the voltage on the

REF

pin. Typically, V

OUT1

is connected to the V

REF

pin to

allow the start-up of V

OUT2

to “track” that of 1/2 V

OUT1

Note that if either V

OUT1

or V

OUT2

is less than 90% (lower

PGOOD threshold) of its regulation point (in either a

startup or short-circuit condition), then channel one’s

inductor current is not allowed to reverse (i.e., discontinu-

ous operation is forced). This is to prevent a minimum on-

time condition during startup.

LTC3776

3776fa

phase detector adjusts the voltage on the PLLLPF pin to

align the turn-on of controller 1’s external P-channel

MOSFET to the rising edge of the synchronizing signal.

Thus, the turn-on of controller 2’s external P-channel

MOSFET is 180 degrees out of phase with the rising edge

of the external clock source.

The typical capture range of the LTC3776’s phase-locked

loop is from approximately 200kHz to 1MHz, with a

guarantee over all process variations and temperature to

be between 250kHz and 850kHz. In other words, the

LTC3776’s PLL is guaranteed to lock to an external clock

source whose frequency is between 250kHz and 850kHz.

Alternatively, the SYNC/SSEN pin may be tied to V

OPERATIO

(Refer to Functional Diagram)

enable spread spectrum operation (see Spread Spectrum

Operation section).

Spread Spectrum Operation

Switching regulators can be particularly troublesome in

applications where electromagnetic interference (EMI) is

a concern. Switching regulators operate on a cycle-by-

cycle basis to transfer power to an output. In most cases,

the frequency of operation is either fixed or is a constant

based on the output load. This method of conversion

creates large components of noise at the frequency of

operation (fundamental) and multiples of the operating

frequency (harmonics). Figures 1a and 1b depict the

Figure 1a. Output Noise Spectrum of Conventional Buck

Switching Converter (LTC3776 with Spread Spectrum

Disabled) Showing Fundamental and Harmonic Frequencies

Figure 1b. Zoom-In of Fundamental Frequency of Conventional

Buck Switching Converter

FREQUENCY (kHz)

–80

AMPLITUDE (dBm)

–20

–10

–90

–100

–30

–60

–40

–50

–70

37361 F01b

–110

= 30Hz

410 450 490 530 570 610

FREQUENCY (MHz)

–80

AMPLITUDE (dBm)

–20

–10

–90

–100

–30

–60

–40

–50

–70

0 6 12 18 24 30

37361 F01a

–110

= 3kHz

Figure 1c. Output Noise Spectrum of the LTC3776 Spread

Spectrum Buck Switching Converter. Note the Reduction in

Fundamental and Harmonic Peak Spectral Amplitude

Compared to Figure 1a.

Figure 1d. Zoom-In of Fundamental Frequency of the

LTC3776 Spread Spectrum Switching Converter. Note the

>20dB Reduction in Peak Amplitude and Spreading of the

Frequency Spectrum (Between Approximately 450kHz and

580kHz) Compared to Figure 1b.

FREQUENCY (kHz)

–80

AMPLITUDE (dBm)

–20

–10

–90

–100

–30

–60

–40

–50

–70

37361 F01d

–110

= 30Hz

410 450 490 530 570 610

FREQUENCY (MHz)

–80

AMPLITUDE (dBm)

–20

–10

–90

–100

–30

–60

–40

–50

–70

0 6 12 18 24 30

37361 F01c

–110

= 1kHz

LTC3776

3776fa

OPERATIO

(Refer to Functional Diagram)

output noise spectrum of a conventional buck switching

converter (1/2 of LTC3776 with spread spectrum opera-

tion disabled) with V

= 5V, V

OUT

= 2.5V and I

OUT

= 2A.

Unlike conventional buck converters, the LTC3776’s inter-

nal oscillator can be selected to produce a clock pulse

whose frequency is randomly varied between 450kHz and

580kHz by tying the SYNC/SSEN pin to V

. This has the

benefit of spreading the switching noise over a range of

frequencies, thus significantly reducing the peak noise.

Figures 1c and 1d show the output noise spectrum of the

LTC3776 (with spread spectrum operation enabled) with

= 5V, V

OUT

= 2.5V and I

OUT

= 1A. Note the significant

reduction in peak output noise (>20dBm).

Dropout Operation

When the input supply voltage (V

) decreases towards the

output voltage, the rate of change of the inductor current

while the external P-channel MOSFET is on (ON cycle)

decreases. This reduction means that the P-channel MOS-

FET will remain on for more than one oscillator cycle if the

inductor current has not ramped up to the threshold set by

the EAMP on the I

pin. Further reduction in the input

supply voltage will eventually cause the P-channel MOS-

FET to be turned on 100%; i.e., DC. The output voltage will

then be determined by the input voltage minus the voltage

drop across the P-channel MOSFET and the inductor.

Undervoltage Lockout

To prevent operation of the external MOSFETs below safe

input voltage levels, an undervoltage lockout is incorporated

in the LTC3776. When the input supply voltage (V

) drops

below 2.3V, the external P- and N-channel MOSFETs and

all internal circuitry are turned off except for the undervolt-

age block, which draws only a few microamperes.

Peak Current Sense Voltage Selection and Slope

Compensation (IPRG1 and IPRG2 Pins)

When controller 1 is operating below 20% duty cycle, the

peak current sense voltage (between the SENSE1

and

SW1 pins) allowed across the external P-channel MOSFET

is determined by:

Δ =

()

AV V

SENSE MAX

ITH

()

–.

107

where A1 is a constant determined by the state of the IPRG

pins. Floating the IPRG1 pin selects A1 = 1; tying IPRG to

selects A1 = 5/3; tying IPRG1 to SGND selects A1 =

2/3. The maximum value of V

ITH1

is typically about 1.98V,

so the maximum sense voltage allowed across the exter-

nal P-channel MOSFET is 125mV, 85mV or 204mV for the

three respective states of the IPRG1 pin.

When controller 2 is operating below 20% duty cycle, the

peak current sense voltage (between the SENSE2

and

SW2 pins) allowed across the external P-channel MOSFET

is determined by:

Δ =

()

≥

Δ =

()

AV V

SENSE MAX

ITH

SENSE MAX

ITH

()

–.

213

where A is a constant determined by the state of the IPRG

pins. Floating the IPRG2 pin selects A2 = 1; tying IPRG2

to V

selects A = 5/3; tying IPRG2 to SGND selects A2 =

2/3. The maximum value of V

ITH2

is typically about 1.98V,

so the maximum sense voltage allowed across the exter-

nal P-channel MOSFET is 147mV, 100mV or 245mV for

the three respective states of the IPRG2 pin. The minimum

value of V

ITH2

is typically about 0.7V, so the minimum

(most negative) peak sense voltage is –112mV, –75mV or

–188mV, respectively.

However, once the controller’s duty cycle exceeds 20%,

slope compensation begins and effectively reduces the

peak sense voltage by a scale factor given by the curve in

Figure 2.

DUTY CYCLE (%)

SF = I/I

MAX

(%)

110

100

3776 F02

200

100

Figure 2. Maximum Peak Current vs Duty Cycle

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P28

LTC3776EUF#TRPBF

Mfr. #:

Buy LTC3776EUF#TRPBF

Manufacturer:

Analog Devices / Linear Technology

Description:

Switching Voltage Regulators 2x 2-Phase, No RSENSE Sync Cntr for DDR/

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

LTC3776EUF#TRPBF

LTC3776EUF#TRPBF

Products related to this Datasheet