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PCA9535PW,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34
PCA9535_PCA9535C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 7 November 2017 19 of 34
NXP Semiconductors
PCA9535; PCA9535C
16-bit I
2
C-bus and SMBus, low power I/O port with interrupt
8.1 Minimizing I
DD
when the I/Os are used to control LEDs
When the PCA9535 I/Os are used to control LEDs, they are normally connected to V
DD
through a resistor as shown in Figure 17
. Since the LED acts as a diode, when the LED is
off the I/O V
I
is about 1.2 V less than V
DD
. The supply current, I
DD
, increases as V
I
becomes lower than V
DD
.
Designs needing to minimize current consumption, such as battery power applications,
should consider maintaining the I/O pins greater than or equal to V
DD
when the LED is off.
Figure 18
shows a high value resistor in parallel with the LED. Figure 19 shows V
DD
less
than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O V
I
at or above V
DD
and prevents additional supply current consumption when the LED is off.
This concern does not occur in the case of PCA9535C because the I/O pins are
open-drain.
9. Limiting values
Fig 18. High value resistor in parallel with
the LED
Fig 19. Device supplied by a lower voltage
002aac189
LED
V
DD
LEDn
100 kΩ
V
DD
002aac190
LED
V
DD
LEDn
3.3 V 5 V
Table 13. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DD
supply voltage 0.5 +6.0 V
V
I/O
voltage on an input/output pin V
SS
0.5 6 V
I
O
output current on an I/O pin - 50 mA
I
I
input current - 20 mA
I
DD
supply current - 160 mA
I
SS
ground supply current - 200 mA
P
tot
total power dissipation - 200 mW
T
stg
storage temperature 65 +150 C
T
amb
ambient temperature operating 40 +85 C
PCA9535_PCA9535C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 7 November 2017 20 of 34
NXP Semiconductors
PCA9535; PCA9535C
16-bit I
2
C-bus and SMBus, low power I/O port with interrupt
10. Static characteristics
[1] V
DD
must be lowered to 0.2 V for at least 5 s in order to reset part.
Table 14. Static characteristics
V
DD
= 2.3 V to 5.5 V; V
SS
=0V; T
amb
=
40
C to +85
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
DD
supply voltage 2.3 - 5.5 V
I
DD
supply current Operating mode; V
DD
=5.5V;
no load; f
SCL
= 100 kHz; I/O = inputs
- 135 200 A
I
stb
standby current Standby mode; V
DD
= 5.5 V; no load;
V
I
=V
SS
; f
SCL
= 0 kHz; I/O = inputs
-0.251A
Standby mode; V
DD
= 5.5 V; no load;
V
I
=V
DD
; f
SCL
= 0 kHz; I/O = inputs
-0.251A
V
POR
power-on reset voltage
[1]
no load; V
I
=V
DD
or V
SS
-1.72.2V
Input SCL; input/output SDA
V
IL
LOW-level input voltage 0.5 - +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
-5.5V
I
OL
LOW-level output current V
OL
=0.4V 3 - - mA
I
L
leakage current V
I
=V
DD
=V
SS
1- +1 A
C
i
input capacitance V
I
=V
SS
- 6 10 pF
I/Os
V
IL
LOW-level input voltage 0.5 - +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
-5.5V
I
OL
LOW-level output current V
DD
= 2.3 V to 5.5 V; V
OL
=0.5V
[2]
810- mA
V
DD
= 2.3 V to 5.5 V; V
OL
=0.7V
[2]
10 14 - mA
V
OH
HIGH-level output voltage PCA9535 only
I
OH
= 8mA; V
DD
=2.3V
[3]
1.8 - - V
I
OH
= 10 mA; V
DD
=2.3V
[3]
1.7 - - V
I
OH
= 8mA; V
DD
=3.0V
[3]
2.6 - - V
I
OH
= 10 mA; V
DD
=3.0V
[3]
2.5 - - V
I
OH
= 8mA; V
DD
=4.75V
[3]
4.1 - - V
I
OH
= 10 mA; V
DD
=4.75V
[3]
4.0 - - V
I
LIH
HIGH-level input leakage current V
DD
=5.5V; V
I
=V
DD
-- 1A
I
LIL
LOW-level input leakage current V
DD
=5.5V; V
I
=V
SS
-- 1 A
C
i
input capacitance - 3.7 5 pF
C
o
output capacitance - 3.7 5 pF
Interrupt INT
I
OL
LOW-level output current V
OL
=0.4V 3 - - mA
Select inputs A0, A1, A2
V
IL
LOW-level input voltage 0.5 - +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
-5.5V
I
LI
input leakage current 1- +1 A
PCA9535_PCA9535C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 7 November 2017 21 of 34
NXP Semiconductors
PCA9535; PCA9535C
16-bit I
2
C-bus and SMBus, low power I/O port with interrupt
[2] Each I/O must be externally limited to a maximum of 25 mA and each octal (IO0_0 to IO0_7 and IO1_0 to IO1_7) must be limited to a
maximum current of 100 mA for a device total of 200 mA.
[3] The total current sourced by all I/Os must be limited to 160 mA. PCA9535C does not source current and does not have the V
OH
specification.
11. Dynamic characteristics
[1] t
VD;ACK
= time for acknowledgement signal from SCL LOW to SDA (out) LOW.
[2] t
VD;DAT
= minimum time for SDA data out to be valid following SCL LOW.
[3] C
b
= total capacitance of one bus line in pF.
[4] t
v(Q)
measured from 0.7V
DD
on SCL to 50 % I/O output (PCA9535). For PCA9535C, use load circuit shown in Figure 24 and measure
from 0.7V
DD
on SCL to 30 % I/O output.
Table 15. Dynamic characteristics
Symbol Parameter Conditions Standard-mode
I
2
C-bus
Fast-mode I
2
C-bus Unit
Min Max Min Max
f
SCL
SCL clock frequency 0 100 0 400 kHz
t
BUF
bus free time between a STOP and
START condition
4.7 - 1.3 - s
t
HD;STA
hold time (repeated) START condition 4.0 - 0.6 - s
t
SU;STA
set-up time for a repeated START
condition
4.7 - 0.6 - s
t
SU;STO
set-up time for STOP condition 4.0 - 0.6 - s
t
VD;ACK
data valid acknowledge time
[1]
0.3 3.45 0.1 0.9 s
t
HD;DAT
data hold time 0 - 0 - ns
t
VD;DAT
data valid time
[2]
300 - 50 - ns
t
SU;DAT
data set-up time 250 - 100 - ns
t
LOW
LOW period of the SCL clock 4.7 - 1.3 - s
t
HIGH
HIGH period of the SCL clock 4.0 - 0.6 - s
t
f
fall time of both SDA and SCL signals - 300 20 + 0.1C
b
[3]
300 ns
t
r
rise time of both SDA and SCL signals - 1000 20 + 0.1C
b
[3]
300 ns
t
SP
pulse width of spikes that must be
suppressed by the input filter
- 50 - 50 ns
Port timing
t
v(Q)
data output valid time
[4]
- 200 - 200 ns
t
su(D)
data input set-up time 150 - 150 - ns
t
h(D)
data input hold time 1 - 1 - s
Interrupt timing
t
v(INT_N)
valid time on pin INT -4 - 4s
t
rst(INT_N)
reset time on pin INT -4 - 4s
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PCA9535PW,118

Mfr. #:
Buy PCA9535PW,118
Manufacturer:
NXP Semiconductors
Description:
Interface - I/O Expanders 16-BIT I2C FM TP GPIO INT
Lifecycle:
New from this manufacturer.
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