MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
31
Maxim Integrated
To use these drivers, choose R1 to set the desired
peak segment current I
PEAK
according to the driver
supply voltage V
DRIVER
and the LED forward voltage
drop V
LED
:
I
PEAK
= (V
DRIVER
- V
LED
- V
CE(SAT)Q1
) /
(R1 + R
DS(ON)Q2
) A
Choose R2 to pass 5mA in order to drop 5V across R3
to provide 5V gate drive to logic-level pFET Q2:
R2 = (V
DRIVER
- V
CE(SAT)Q3
- 5) x 200Ω
Rate Q1 at segment current I
PEAK
, and rate Q2 at row
current, which is 16 times I
PEAK
.
Using the MAX6960 as Driver/Controller
for RGB Displays
A MAX6960 can drive an 8 x 16 LED matrix, and so one
MAX6960 can drive two 8 x 8 monocolor digits or one 8
x 8 RGY digit. A MAX6960 cannot directly drive an 8 x
8 RGB display digit, but MAX6960s can nevertheless
be used to build RGB panels.
The MAX6960 drivers provide 3 x 2 = 6 bits of color
control to an RGB panel, or 64 colors.
The best way to drive RGB LEDs with the MAX6960 is to
use three 3-wire buses, one for each color (Figure 17). A
single 4-wire interface must be used, with three CSs,
again one for each color. The red and green LEDs are
driven directly by their MAX6960s, and are connected
cathode row as normal. The blue LEDs cannot be driven
directly by their MAX6960s because the blue LED for-
ward voltage is too high, so external drive transistors
must be used as discussed previously. The blue LEDs
are therefore connected anode row. The MAX6960 is
suitable to drive discrete RGB matrix displays using
either separate LEDs for the red, green, and blue or six-
terminal surface-mount or through-hole RGB LEDs. The
six-terminal LEDs must be used to give individual access
to the anodes and cathodes. The MAX6960 is not suit-
able to drive prewired RGB 8 x 8 matrix displays
because the row/column wiring is incorrect.
Synchronization is achieved by writing the global panel
configuration registers for every driver at the same
time. The user must therefore provide a method for dri-
ving all three CSs together when writing the global
panel configuration register. This complexity aside, the
three-bus method automatically organizes the display
memory into three color planes. Also, ripple sync and
mux flip can be enabled or disabled in any manner
desired. The digit limit for one set of three 3-wire buses
is 768 RGB digits using 256 MAX6960s. The structure
can be repeated to build a very large panel.
