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LTC1852CFW#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
LTC1852/LTC1853
1
18523fa
BLOCK DIAGRAM
FEATURES
APPLICATIONS
DESCRIPTION
8-Channel, 10-Bit/12-Bit,
400ksps, Low Power, Sampling ADCs
The 10-bit LTC
®
1852 and 12-bit LTC1853 are complete
8-channel data acquisition systems. They include a fl exible
8-channel multiplexer, a 400ksps successive approxima-
tion analog-to-digital converter, an internal reference and a
parallel output interface. The multiplexer can be confi gured
for single-ended or differential inputs, two gain ranges and
unipolar or bipolar operation. The ADCs have a scan mode
that will repeatedly cycle through all 8 multiplexer channels
and can also be programmed to sequence through up to
16 addresses and confi gurations. The sequence can also
be read back from internal memory.
The reference and buffer amplifi er provide pin strappable
ranges of 4.096V, 2.5V and 2.048V. The parallel output
includes the 10-bit or 12-bit conversion result plus the
4-bit multiplexer address. The digital outputs are pow-
ered from a separate supply allowing for easy interface
to 3V digital logic. Typical power consumption is 10mW
at 400ksps from a single 5V supply and 3mW at 250ksps
from a single 3V supply.
n
Flexible 8-Channel Multiplexer
Single-Ended or Differential Inputs
Two Gain Ranges
Unipolar or Bipolar Operation
n
Scan Mode and Programmable Sequencer
Eliminate Confi guration Software Overhead
n
Low Power: 3mW at 250ksps
n
2.7V to 5.5V Supply Range
n
Internal or External Reference Operation
n
Parallel Output Includes MUX Address
n
Nap and Sleep Shutdown Modes
n
Pin Compatible up-grade 1.25Msps 10-Bit LTC1850
and 12-Bit LTC1851
n
High Speed Data Acquisition
n
Test and Measurement
n
Imaging Systems
n
Telecommunications
n
Industrial Process Control
n
Spectrum Analysis
BUSY
DIFF
OUT
/S6
A2
OUT
/S5
A1
OUT
/S4
A0
OUT
/S3
D11/S2
D10/S1
D9/S0
D8
D7
D6
D5
D4
D3
D2
D1
D0
M1
SHDN
CS
CONVST
RD
WR
DIFF
A2
A1
A0
UNI/BIP
PGA
M0
OUTPUT
DRIVERS
DATA
LATCHES
OGND
18523 BD
OV
DD
REF AMP
REFCOMP
REFIN
REFOUT
COM
CH7
CH6
CH5
CH4
CH3
CH2
CH1
CH0
8-CHANNEL
MULTIPLEXER
2.5V
REFERENCE
INTERNAL
CLOCK
LTC1853
CONTROL LOGIC
AND
PROGRAMMABLE
SEQUENCER
12-BIT
SAMPLING
ADC
+
–
Integral Linearity
0 512 1024 1536 2048 2560 3072 3584 4096
CODE
1.0
0.5
0
–0.5
–1.0
INL ERROR (LSBs)
1852 F01
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
LTC1852/LTC1853
2
18523fa
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
OV
DD
= V
DD
(Note 1, 2)
ORDER INFORMATION
Supply Voltage (V
DD
) ..................................................6V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage (Note 4) .................... –0.3V to 10V
Digital Output Voltage ..................–0.3V to (V
DD
+ 0.3V)
Power Dissipation ...............................................500mW
Ambient Operating Temperature Range
LTC1852C/LTC1853C .............................. 0°C to 70°C
LTC1852I/LTC1853I ............................. –40°C to 85°C
Storage Temperature Range ...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec) ................. 300°C
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC1852CFW#PBF LTC1852CFW#TRPBF LTC1852CFW 48-Lead Plastic TSSOP (6.1mm) 0°C to 70°C
LTC1852IFW#PBF LTC1852IFW#TRPBF LTC1852IFW 48-Lead Plastic TSSOP (6.1mm) –40°C to 85°C
LTC1853CFW#PBF LTC1853CFW#TRPBF LTC1853CFW 48-Lead Plastic TSSOP (6.1mm) 0°C to 70°C
LTC1853IFW#PBF LTC1853IFW#TRPBF LTC1853IFW 48-Lead Plastic TSSOP (6.1mm) –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi
cations, go to: http://www.linear.com/tapeandreel/
LTC1852
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
TOP VIEW
FW PACKAGE
48-LEAD PLASTIC TSSOP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
REFOUT
REFIN
REFCOMP
GND
V
DD
V
DD
GND
DIFF
OUT
/S6
A2
OUT
/S5
A1
OUT
/S4
A0
OUT
/S3
D9/S2
D8/S1
D7/S0
D6
M1
SHDN
CS
CONVST
RD
WR
DIFF
A2
A1
A0
UNI/BIP
PGA
M0
OV
DD
OGND
BUSY
NC
NC
D0
D1
D2
D3
D4
D5
LTC1853
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
TOP VIEW
FW PACKAGE
48-LEAD PLASTIC TSSOP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
REFOUT
REFIN
REFCOMP
GND
V
DD
V
DD
GND
DIFF
OUT
/S6
A2
OUT
/S5
A1
OUT
/S4
A0
OUT
/S3
D11/S2
D10/S1
D9/S0
D8
M1
SHDN
CS
CONVST
RD
WR
DIFF
A2
A1
A0
UNI/BIP
PGA
M0
OV
DD
OGND
BUSY
D0
D1
D2
D3
D4
D5
D6
D7
T
JMAX
= 150°C, θ
JA
= 110°C/W T
JMAX
= 150°C, θ
JA
= 110°C/W
LTC1852/LTC1853
3
18523fa
CONVERTER CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. V
DD
= 2.7V to 5.5V, REFCOMP < V
DD
(Notes 5,6)
PARAMETER CONDITIONS MIN
LTC1852
TYP MAX MIN
LTC1853
TYP MAX UNITS
Resolution (No Missing Codes)
l
10 12 Bits
Integral Linearity Error (Note 7)
l
±0.25 ±1 ±0.35 ±1 LSB
Differential Linearity Error
l
±0.25 ±1 ±0.25 ±1 LSB
Offset Error (Bipolar and Unipolar)
Gain = 1 (PGA = 1)
Gain = 2 (PGA = 0)
(Note 8)
REFCOMP ≥ 2V
l
l
±0.5
±1
±2
±4
±1
±2
±6
±12
LSB
LSB
Offset Error Match (Bipolar and Unipolar) ±0.5 ±1 LSB
Unipolar Gain Error
Gain = 1 (PGA = 1)
Gain = 2 (PGA = 0)
With External 4.096V Reference
Applied to REFCOMP (Note 12)
V
DD
= 4.75V to 5.25V, f
S
≤ 400kHz
±2
±4
±4
±8
LSB
LSB
Unipolar Gain Error Match ±0.5 ±1 LSB
Bipolar Gain Error
Gain = 1 (PGA = 1)
Gain = 2 (PGA = 0)
With External 4.096V Reference
Applied to REFCOMP (Note 12)
V
DD
= 4.75V to 5.25V, f
S
≤ 400kHz
±2
±4
±4
±8
LSB
LSB
Bipolar Gain Error Match ±0.5 ±1 LSB
Unipolar Gain Error
Gain = 1 (PGA = 1)
Gain = 2 (PGA = 0)
With External 2.5V Reference
Applied to REFCOMP
V
DD
= 2.7V to 5.5V, f
S
≤ 250kHz
l
l
±1
±2
±3
±6
±1.5
±3
±8
±16
LSB
LSB
Bipolar Gain Error
Gain = 1 (PGA = 1)
Gain = 2 (PGA = 0)
With External 2.5V Reference
Applied to REFCOMP
V
DD
= 2.7V to 5.5V, f
S
≤ 250kHz
l
l
±1
±2
±3
±6
±1.5
±3
±8
±16
LSB
LSB
Full-Scale Error Temperature Coeffi cient 15 15 ppm/°C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
Analog Input Range (Note 9)
Unipolar, Gain = 1 (PGA = 1)
Unipolar, Gain = 2 (PGA = 0)
Bipolar, Gain = 1 (PGA = 1)
Bipolar, Gain = 2 (PGA = 0)
2.7V ≤ V
DD
≤ 5.5V, REFCOMP ≤ V
DD
0 – REFCOMP
0 – REFCOMP/2
±REFCOMP/2
±REFCOMP/4
V
V
V
V
I
IN
Analog Input Leakage Current
l
±1 μA
C
IN
Analog Input Capacitance Between Conversions (Gain = 1)
Between Conversions (Gain = 2)
During Conversions
15
25
5
pF
pF
pF
t
ACQ
Sample-and-Hold Acquisition Time 50 150 ns
t
S(MUX)
Multiplexer Settling Time (Includes t
ACQ
) 50 150 ns
t
AP
Sample-and-Hold Aperture Delay Time V
DD
= 5V –0.5 ns
t
jitter
Sample-and-Hold Aperture Delay Time Jitter V
DD
= 5V 2 ps
RMS
CMRR Analog Input Common Mode Rejection Ratio 60 dB
ANALOG INPUT
The l denotes the specifi cations which apply over the full operating temperature range, otherwise
specifi cations are at T
A
= 25°C. (Notes 5)
DYNAMIC ACCURACY
T
A
= 25°C. (Notes 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
S/(N + D) Signal-to-Noise Plus Distortion Ratio 40kHz Input Signal 72.5 dB
THD Total Harmonic Distortion 40kHz Input Signal, First 5 Harmonics –80 dB
SFDR Spurious Free Dynamic Range 40kHz Input Signal –85 dB
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

LTC1852CFW#PBF

Mfr. #:
Buy LTC1852CFW#PBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 10-bit, 8-ch. Parallel 400ksps ADC
Lifecycle:
New from this manufacturer.
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