LTC1852/LTC1853
4
18523fa
INTERNAL REFERENCE
T
A
= 25°C. (Notes 5, 6)
PARAMETER CONDITIONS MIN TYP MAX UNITS
REFOUT Output Voltage I
OUT
= 0 2.48 2.50 2.52 V
REFOUT Output Temperature Coeffi cient I
OUT
= 0 ±15 ppm/°C
REFOUT Line Regulation 2.7 ≤ V
DD
≤ 5.5, I
OUT
= 0 0.01 LSB/V
Reference Buffer Gain 1.6368 1.6384 1.6400 V/V
REFCOMP Output Voltage External 2.5V Reference (V
DD
= 5V)
Internal 2.5V Reference (V
DD
= 5V)
4.092
4.060
4.096
4.096
4.100
4.132
V
V
REFCOMP Impedance Impedance to GND, REFIN = V
DD
19.2
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
High Level Input Voltage V
DD
= 5.25V
2.4 V
V
IL
Low Level Input Voltage V
DD
= 4.75V
0.8 V
I
IN
Digital Input Current V
IN
= 0V to V
DD
±5 μA
C
IN
Digital Input Capacitance 1.5 pF
V
OH
High Level Output Voltage V
DD
= 4.75V, I
O
= –10μA
V
DD
= 4.75V, I
O
= –200μA
4
4.5 V
V
V
OL
Low Level Output Voltage V
DD
= 4.75V, I
O
= 160μA
V
DD
= 4.75V, I
O
= 1.6mA
0.5
0.10 0.4
V
V
I
OZ
Hi-Z Output Leakage D11 to D0, A0, A1, A2
OUT
, DIFF
OUT
V
OUT
= 0V to V
DD
, CS High
±10 μA
C
OZ
Hi-Z Capacitance D11 to D0 CS High (Note 9)
15 pF
I
SOURCE
Output Source Current V
OUT
= 0V –20 mA
I
SINK
Output Sink Current V
OUT
= V
DD
30 mA
DIGITAL INPUTS AND DIGITAL OUTPUTS
The denotes the specifi cations which apply over the full
operating temperature range, otherwise specifi cations are at T
A
= 25°C. V
DD
= 5V (Note 5)
DIGITAL INPUTS AND DIGITAL OUTPUTS
The denotes the specifi cations which apply over the full
operating temperature range, otherwise specifi cations are at T
A
= 25°C. V
DD
= 5V (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
High Level Input Voltage V
DD
= 3.3V
1.9 V
V
IL
Low Level Input Voltage V
DD
= 2.7V
0.45 V
I
IN
Digital Input Current V
IN
= 0V to V
DD
±5 μA
C
IN
Digital Input Capacitance 1.5 pF
V
OH
High Level Output Voltage V
DD
= 2.7V, I
O
= –10μA
V
DD
= 2.7V, I
O
= –200μA
2
2.5 V
V
V
OL
Low Level Output Voltage V
DD
= 2.7V, I
O
= 160μA
V
DD
= 2.7V, I
O
= 1.6mA
0.05
0.10 0.4
V
V
I
OZ
Hi-Z Output Leakage D11 to D0, A0, A1, A2
OUT
, DIFF
OUT
V
OUT
= 0V to V
DD
, CS High
±10 μA
C
OZ
Hi-Z Capacitance D11 to D0 CS High (Note 9)
15 pF
I
SOURCE
Output Source Current V
OUT
= 0V –10 mA
I
SINK
Output Sink Current V
OUT
= V
DD
15 mA
LTC1852/LTC1853
5
18523fa
POWER REQUIREMENTS
The denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T
A
= 25°C. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
DD
Analog Positive Supply Voltage (Note 10)
2.7 5.5 V
OV
DD
Output Positive Supply Voltage (Note 10)
2.7 5.5 V
I
DD
Positive Supply Current V
DD
= OV
DD
= 5V, f
S
= 400kHz
V
DD
= OV
DD
= 2.7V, f
S
= 250kHz
2
0.83
3
1.33
mA
mA
P
DISS
Power Dissipation V
DD
= OV
DD
= 5V, f
S
= 400kHz
V
DD
= OV
DD
= 2.7V, f
S
= 250kHz
10
2.25
15
4
mW
mW
I
DDPD
Power Down Positive Supply Current
Nap Mode
Sleep Mode
SHDN = Low, CS = Low
SHDN = Low, CS = High
0.5
20
mA
μA
Power Down Power Dissipation
Nap Mode
Sleep Mode
V
DD
= V
DD
= OV
DD
= 5V, f
S
= 400kHz
SHDN = Low, CS = Low
SHDN = Low, CS = High
2.5
0.1
mW
mW
Power Down Power Dissipation
Nap Mode
Sleep Mode
V
DD
= V
DD
= OV
DD
= 3V, f
S
= 250kHz
SHDN = Low, CS = Low
SHDN = Low, CS = High
1.5
0.06
mW
mW
TIMING CHARACTERISTICS
The denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T
A
= 25°C. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
SAMPLE(MAX)
Maximum Sampling Frequency V
DD
= 5.5V
V
DD
= 2.7V
400
250
kHz
kHz
Acquisition + Conversion V
DD
= 5.5V
V
DD
= 2.7V
2.5
4.0
μs
μs
t
CONV
Conversion Time V
DD
= 5.5V
V
DD
= 2.7V
2.0
3.5
μs
μs
t
ACQ
Acquisition Time (Note 13)
150 ns
t
1
CS to RD Setup Time (Notes 9, 10)
0ns
t
2
CS to CONVST Setup Time (Notes 9, 10)
10 ns
t
3
CS to SHDN Setup Time (Notes 9, 10) 200 ns
t
4
SHDN to CONVST Wake-Up Time Nap Mode (Note 10)
Sleep Mode (Note 10)
200
10
ns
ms
t
5
CONVST Low Time (Notes 10, 11)
50 ns
t
6
CONVST to BUSY Delay C
L
= 25pF
10
60
ns
ns
t
7
Data Ready Before BUSY
20
15
35 ns
ns
t
8
Delay Between Conversions (Note 10)
50 ns
t
9
Wait Time RD After BUSY
–5 ns
t
10
Data Access Time After RD C
L
= 25pF
20 35
45
ns
ns
C
L
= 100pF
25 45
60
ns
ns
t
11
BUS Relinquish Time
0°C to 70°C
40°C to 85°C
10 30
35
40
ns
ns
ns
t
12
RD Low Time
t
10
ns
LTC1852/LTC1853
6
18523fa
TIMING CHARACTERISTICS
The denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T
A
= 25°C. (Note 5)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with OGND and GND
wired together unless otherwise noted.
Note 3: When these pin voltages are taken below ground or above V
DD
,
they will be clamped by internal diodes. This product can handle input
currents of 100mA below ground or above V
DD
without latchup.
Note 4: When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
100mA below ground without latchup. These pins are not clamped to V
DD
.
Note 5: V
DD
= 5V, f
SAMPLE
= 400kHz, t
r
= t
f
= 2ns unless otherwise
specifi ed.
Note 6: Linearity, offset and full-scale specifi cations apply for a single-
ended input on any channel with COM grounded.
Note 7: Integral nonlinearity is defi ned as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from –0.5LSB when
the output code fl ickers between 1111 1111 1111 and 0000 0000 0000.
For the LTC1853 and between 11 1111 1111 and 00 0000 0000 for the
LTC1852.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors.
For the best results, ensure that CONVST returns high either within 400ns
after the start of the conversion or after BUSY rises.
Note 12: The analog input range is determined by the voltage on
REFCOMP. The gain error specifi cation is tested with an external 4.096V
but is valid for any value of REFCOMP greater than 2V and less than
(V
DD
– 0.5V.)
Note 13: MUX address is updated immediately after BUSY falls.
1.0
0.5
0
–0.5
–1.0
0 4096
CODE
DNL ERROR (LBS)
1852 F02
0
–20
–40
–60
–80
–100
–120
0 200
FREQUENCY (kHz)
AMPLITUDE (dB)
1852 F03
Differential Linearity
8192 Point FFT with
f
IN
= 39.599kHz
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
13
CONVST High Time (Note 10)
50 ns
t
14
Latch Setup Time (Note 10)
10 ns
t
15
Latch Hold Time (Notes 9, 10)
10 ns
t
16
WR Low Time (Note 10)
50 ns
t
17
WR High Time (Note 10)
50 ns
t
18
M1 to M0 Setup Time (Notes 9, 10)
10 ns
t
19
M0 to BUSY Delay M1 High 20 ns
t
20
M0 to WR (or RD) Setup Time (Notes 9, 10)
t
19
ns
t
21
M0 High Pulse Width (Note 10)
50 ns
t
22
RD High Time Between Readback Reads (Note 10)
50 ns
t
23
Last WR (or RD) to M0 (Note 10)
10 ns
t
24
M0 to RD Setup Time (Notes 9, 10)
t
19
ns
t
25
M0 to CONVST (Note 10)
t
19
ns
t
26
Aperture Delay 0.5 ns
t
27
Aperture Jitter 2ps
RMS
TYPICAL PERFORMANCE CHARACTERISTICS

LTC1852CFW#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 10-bit, 8-ch. Parallel 400ksps ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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